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authorSandrine Bailleux <sandrine.bailleux@arm.com>2015-10-30 15:05:17 +0000
committerAchin Gupta <achin.gupta@arm.com>2015-11-26 21:32:38 +0000
commita9bec67dfda087ac739a29cbc4eb4ccb38da3e45 (patch)
treeec0f9f2ab8a9e68f9862ed8050e9b3a3d1309c59 /bl1/aarch64/bl1_entrypoint.S
parentaba2f1e023014c58cf72a1378df0a6a17d2871dc (diff)
downloadtrusted-firmware-a-a9bec67dfda087ac739a29cbc4eb4ccb38da3e45.tar.gz
Introduce COLD_BOOT_SINGLE_CPU build option
This patch introduces a new build option named COLD_BOOT_SINGLE_CPU, which allows platforms that only release a single CPU out of reset to slightly optimise their cold boot code, both in terms of code size and performance. COLD_BOOT_SINGLE_CPU defaults to 0, which assumes that the platform may release several CPUs out of reset. In this case, the cold reset code needs to coordinate all CPUs via the usual primary/secondary CPU distinction. If a platform guarantees that only a single CPU will ever be released out of reset, there is no need to arbitrate execution ; the notion of primary and secondary CPUs itself no longer exists. Such platforms may set COLD_BOOT_SINGLE_CPU to 1 in order to compile out the primary/secondary CPU identification in the cold reset code. All ARM standard platforms can release several CPUs out of reset so they use COLD_BOOT_SINGLE_CPU=0. However, on CSS platforms like Juno, bringing up more than one CPU at reset should only be attempted when booting an EL3 payload, as it is not fully supported in the normal boot flow. For platforms using COLD_BOOT_SINGLE_CPU=1, the following 2 platform APIs become optional: - plat_secondary_cold_boot_setup(); - plat_is_my_cpu_primary(). The Porting Guide has been updated to reflect that. User Guide updated as well. Change-Id: Ic5b474e61b7aec1377d1e0b6925d17dfc376c46b
Diffstat (limited to 'bl1/aarch64/bl1_entrypoint.S')
-rw-r--r--bl1/aarch64/bl1_entrypoint.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index 4fc52918ad..83594f2186 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -51,7 +51,7 @@ func bl1_entrypoint
el3_entrypoint_common \
_set_endian=1 \
_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
- _secondary_cold_boot=1 \
+ _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
_init_memory=1 \
_init_c_runtime=1 \
_exception_vectors=bl1_exceptions