path: root/bl1/aarch64/bl1_entrypoint.S
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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-04-28 12:28:39 +0100
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-05-07 11:19:47 +0100
commit8cec598ba3b689b86d9dfc58bca5610bdc48f55a (patch)
tree10a3622d6a57fe02b45112fd512297238ad93dc5 /bl1/aarch64/bl1_entrypoint.S
parente404d7f44a190b82332bb96daffa0c6239732218 (diff)
Correct usage of data and instruction barriers
The current code does not always use data and instruction barriers as required by the architecture and frequently uses barriers excessively due to their inclusion in all of the write_*() helper functions. Barriers should be used explicitly in assembler or C code when modifying processor state that requires the barriers in order to enable review of correctness of the code. This patch removes the barriers from the helper functions and introduces them as necessary elsewhere in the code. PORTING NOTE: check any port of Trusted Firmware for use of system register helper functions for reliance on the previous barrier behaviour and add explicit barriers as necessary. Fixes ARM-software/tf-issues#92 Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
Diffstat (limited to 'bl1/aarch64/bl1_entrypoint.S')
1 files changed, 0 insertions, 1 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index 012b779c77..e25386f74d 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -86,7 +86,6 @@ func bl1_entrypoint
mrs x0, sctlr_el3
orr x0, x0, #SCTLR_I_BIT
msr sctlr_el3, x0