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author | Varun Wadekar <vwadekar@nvidia.com> | 2020-06-12 10:11:28 -0700 |
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committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-06-12 10:20:11 -0700 |
commit | fbc44bd1bbbafe01848afd009d507b595b264b5f (patch) | |
tree | 67431f3739b10391c78b582f53c371f3ef41d1c8 /Makefile | |
parent | 0d8511953e19a5da80ac1a0ed9ec8e76b57a33a8 (diff) | |
download | trusted-firmware-a-fbc44bd1bbbafe01848afd009d507b595b264b5f.tar.gz |
Prevent RAS register access from lower ELs
This patch adds a build config 'RAS_TRAP_LOWER_EL_ERR_ACCESS' to set
SCR_EL3.TERR during CPU boot. This bit enables trapping RAS register
accesses from EL1 or EL2 to EL3.
RAS_TRAP_LOWER_EL_ERR_ACCESS is disabled by default.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ifb0fb0afedea7dd2a29a0b0491a1161ecd241438
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -900,6 +900,7 @@ $(eval $(call assert_boolean,USE_SPINLOCK_CAS)) $(eval $(call assert_boolean,ENCRYPT_BL31)) $(eval $(call assert_boolean,ENCRYPT_BL32)) $(eval $(call assert_boolean,ERRATA_SPECULATIVE_AT)) +$(eval $(call assert_boolean,RAS_TRAP_LOWER_EL_ERR_ACCESS)) $(eval $(call assert_numeric,ARM_ARCH_MAJOR)) $(eval $(call assert_numeric,ARM_ARCH_MINOR)) @@ -979,6 +980,7 @@ $(eval $(call add_define,BL2_IN_XIP_MEM)) $(eval $(call add_define,BL2_INV_DCACHE)) $(eval $(call add_define,USE_SPINLOCK_CAS)) $(eval $(call add_define,ERRATA_SPECULATIVE_AT)) +$(eval $(call add_define,RAS_TRAP_LOWER_EL_ERR_ACCESS)) ifeq (${SANITIZE_UB},trap) $(eval $(call add_define,MONITOR_TRAPS)) |