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author | Chiaki Fujii <chiaki.fujii.wj@renesas.com> | 2019-12-26 12:57:40 +0900 |
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committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2020-02-15 10:46:00 +0100 |
commit | cc4e7ad49e5a288dff9236a57aca3858548d26aa (patch) | |
tree | a4c4fff546e40845ff431392a8a4d4bfe039bf7e | |
parent | 1f420077b6c5e1c0e6396ec61363b1f8effbeb4e (diff) | |
download | trusted-firmware-a-cc4e7ad49e5a288dff9236a57aca3858548d26aa.tar.gz |
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.40.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: If675796a2314e769602af21bf5cc6b10962d4f29
-rw-r--r-- | drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c | 4 | ||||
-rw-r--r-- | drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c index 1234fb6674..ac83c9a107 100644 --- a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c +++ b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c @@ -2080,8 +2080,8 @@ static void dbsc_regset(void) /* DBTR9.TRDPR : tRTP */ mmio_write_32(DBSC_DBTR(9), js2[js2_trtp]); - /* DBTR10.TWR : nWR + 1 */ - mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr + 1); + /* DBTR10.TWR : nWR */ + mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr); /* * DBTR11.TRDWR : RL + BL / 2 + Rounddown(tRPST) + PHY_ODTLoff - diff --git a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h index dc153a67f0..56363eb997 100644 --- a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h +++ b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h @@ -5,7 +5,7 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#define RCAR_DDR_VERSION "rev.0.39" +#define RCAR_DDR_VERSION "rev.0.40" #define DRAM_CH_CNT 0x04 #define SLICE_CNT 0x04 #define CS_CNT 0x02 |