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authorManish V Badarkhe <Manish.Badarkhe@arm.com>2020-10-07 16:04:06 +0100
committerManish Pandey <manish.pandey2@arm.com>2020-10-12 10:40:22 +0000
commitc959ea78e527a6ba2ac406ed16f2ca05b0f6ee7c (patch)
tree643f75ef76c6c94f798a4c9e667a73b724f109d4
parente1b8cd1a582ddc4858bd685bc2319e56793edd97 (diff)
downloadtrusted-firmware-a-c959ea78e527a6ba2ac406ed16f2ca05b0f6ee7c.tar.gz
Remove deprecated macro from TF-A code
Removed '__ASSEMBLY__' deprecated macro from TF-A code Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
-rw-r--r--Makefile3
-rw-r--r--include/drivers/marvell/cache_llc.h4
-rw-r--r--plat/nvidia/tegra/include/drivers/memctrl_v2.h8
-rw-r--r--plat/nvidia/tegra/include/t186/tegra_mc_def.h4
4 files changed, 9 insertions, 10 deletions
diff --git a/Makefile b/Makefile
index a9a4d9058a..cb47491a45 100644
--- a/Makefile
+++ b/Makefile
@@ -1067,8 +1067,7 @@ ifneq ($(findstring clang,$(notdir $(CC))),)
else
CPPFLAGS += -Wno-error=deprecated-declarations -Wno-error=cpp
endif
-# __ASSEMBLY__ is deprecated in favor of the compiler-builtin __ASSEMBLER__.
-ASFLAGS += -D__ASSEMBLY__
+
# AARCH32/AARCH64 macros are deprecated in favor of the compiler-builtin __aarch64__.
ifeq (${ARCH},aarch32)
$(eval $(call add_define,AARCH32))
diff --git a/include/drivers/marvell/cache_llc.h b/include/drivers/marvell/cache_llc.h
index d6dd65382f..72111b374a 100644
--- a/include/drivers/marvell/cache_llc.h
+++ b/include/drivers/marvell/cache_llc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2018 Marvell International Ltd.
+ * Copyright (C) 2018-2020 Marvell International Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
@@ -57,6 +57,6 @@ int llc_sram_enable(int ap_index, int size);
void llc_sram_disable(int ap_index);
int llc_sram_test(int ap_index, int size, char *msg);
#endif /* LLC_SRAM */
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* CACHE_LLC_H */
diff --git a/plat/nvidia/tegra/include/drivers/memctrl_v2.h b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
index 1e153063a6..9af3027ea3 100644
--- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -26,7 +26,7 @@
#define MC_SMMU_BYPASS_CONFIG_SETTINGS (MC_SMMU_BYPASS_CONFIG_WRITE_ACCESS_BIT | \
MC_SMMU_CTRL_TBU_BYPASS_SPL_STREAMID)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <assert.h>
@@ -53,9 +53,9 @@ typedef struct mc_regs {
.val = 0xFFFFFFFFU, \
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <lib/mmio.h>
diff --git a/plat/nvidia/tegra/include/t186/tegra_mc_def.h b/plat/nvidia/tegra/include/t186/tegra_mc_def.h
index 398453eb95..fa447725ba 100644
--- a/plat/nvidia/tegra/include/t186/tegra_mc_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_mc_def.h
@@ -282,7 +282,7 @@
#define MC_CLIENT_HOTRESET_CTRL1_SCE_FLUSH_ENB (1U << 24)
#define MC_CLIENT_HOTRESET_STATUS1 0x974U
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*******************************************************************************
* Structure to hold the transaction override settings to use to override
@@ -393,6 +393,6 @@ typedef struct mc_streamid_security_cfg {
MC_TXN_OVERRIDE_CONFIG_CGID_##so_dev_axi_id); \
} while (0)
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* TEGRA_MC_DEF_H */