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authorSandrine Bailleux <sandrine.bailleux@arm.com>2015-06-02 17:19:43 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2015-06-04 11:38:58 +0100
commitbf031bba2b9dfc994a7d0c18dfc5e64469cee480 (patch)
tree883cd29a4f171803bd1ea65e34b41f73501757db
parent52010cc779a59f2bc8a23fa5754630a6e63119a4 (diff)
downloadtrusted-firmware-a-bf031bba2b9dfc994a7d0c18dfc5e64469cee480.tar.gz
Introduce PROGRAMMABLE_RESET_ADDRESS build option
This patch introduces a new platform build option, called PROGRAMMABLE_RESET_ADDRESS, which tells whether the platform has a programmable or fixed reset vector address. If the reset vector address is fixed then the code relies on the platform_get_entrypoint() mailbox mechanism to figure out where it is supposed to jump. On the other hand, if it is programmable then it is assumed that the platform code will program directly the right address into the RVBAR register (instead of using the mailbox redirection) so the mailbox is ignored in this case. Change-Id: If59c3b11fb1f692976e1d8b96c7e2da0ebfba308
-rw-r--r--Makefile7
-rw-r--r--bl1/aarch64/bl1_entrypoint.S8
-rw-r--r--bl31/aarch64/bl31_entrypoint.S8
-rw-r--r--docs/user-guide.md4
-rw-r--r--services/std_svc/psci/psci_entry.S7
5 files changed, 31 insertions, 3 deletions
diff --git a/Makefile b/Makefile
index d38a28327a..9fabdcad60 100644
--- a/Makefile
+++ b/Makefile
@@ -76,6 +76,9 @@ CREATE_KEYS := 1
# Flags to build TF with Trusted Boot support
TRUSTED_BOARD_BOOT := 0
AUTH_MOD := none
+# By default, consider that the platform's reset address is not programmable.
+# The platform Makefile is free to override this value.
+PROGRAMMABLE_RESET_ADDRESS := 0
# Checkpatch ignores
CHECK_IGNORE = --ignore COMPLEX_MACRO \
@@ -271,6 +274,10 @@ $(eval $(call assert_boolean,CREATE_KEYS))
$(eval $(call assert_boolean,TRUSTED_BOARD_BOOT))
$(eval $(call add_define,TRUSTED_BOARD_BOOT))
+# Process PROGRAMMABLE_RESET_ADDRESS flag
+$(eval $(call assert_boolean,PROGRAMMABLE_RESET_ADDRESS))
+$(eval $(call add_define,PROGRAMMABLE_RESET_ADDRESS))
+
ASFLAGS += -nostdinc -ffreestanding -Wa,--fatal-warnings \
-Werror -Wmissing-include-dirs \
-mgeneral-regs-only -D__ASSEMBLY__ \
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index 147c930c37..4fc52918ad 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -42,9 +42,15 @@
*/
func bl1_entrypoint
+ /* ---------------------------------------------------------------------
+ * If the reset address is programmable then bl1_entrypoint() is
+ * executed only on the cold boot path. Therefore, we can skip the warm
+ * boot mailbox mechanism.
+ * ---------------------------------------------------------------------
+ */
el3_entrypoint_common \
_set_endian=1 \
- _warm_boot_mailbox=1 \
+ _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
_secondary_cold_boot=1 \
_init_memory=1 \
_init_c_runtime=1 \
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index 5350f68fc4..5ba0f9cc4b 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -76,9 +76,15 @@ func bl31_entrypoint
mov x0, x20
mov x1, x21
#else
+ /* ---------------------------------------------------------------------
+ * For RESET_TO_BL31 systems which have a programmable reset address,
+ * bl31_entrypoint() is executed only on the cold boot path so we can
+ * skip the warm boot mailbox mechanism.
+ * ---------------------------------------------------------------------
+ */
el3_entrypoint_common \
_set_endian=1 \
- _warm_boot_mailbox=1 \
+ _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
_secondary_cold_boot=1 \
_init_memory=1 \
_init_c_runtime=1 \
diff --git a/docs/user-guide.md b/docs/user-guide.md
index c1cadbbe8c..908665cbcf 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -320,6 +320,10 @@ performed.
* `BL33_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
file that contains the BL3-3 private key in PEM format.
+* `PROGRAMMABLE_RESET_ADDRESS`: This option indicates whether the reset
+ vector address can be programmed or is fixed on the platform. It can take
+ either 0 (fixed) or 1 (programmable). Default is 0.
+
#### ARM development platform specific build options
* `ARM_TSP_RAM_LOCATION_ID`: location of the TSP binary. Options:
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index 3f22159057..050f6c6c6d 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -57,6 +57,11 @@ psci_aff_common_finish_entry:
* On the warm boot path, most of the EL3 initialisations performed by
* 'el3_entrypoint_common' must be skipped:
*
+ * - Only when the platform bypasses the BL1/BL3-1 entrypoint by
+ * programming the reset address do we need to set the CPU endianness.
+ * In other cases, we assume this has been taken care by the
+ * entrypoint code.
+ *
* - No need to determine the type of boot, we know it is a warm boot.
*
* - Do not try to distinguish between primary and secondary CPUs, this
@@ -66,7 +71,7 @@ psci_aff_common_finish_entry:
* it has been done once and for all on the cold boot path.
*/
el3_entrypoint_common \
- _set_endian=0 \
+ _set_endian=PROGRAMMABLE_RESET_ADDRESS \
_warm_boot_mailbox=0 \
_secondary_cold_boot=0 \
_init_memory=0 \