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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2017-10-25 11:53:25 +0100
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2017-11-08 18:05:14 +0000
commitad02a7596f73ea9f07ebc9e04970ab7e9961c868 (patch)
tree435ae69cc9a11a59fb6ad16f8dda2022bed574a3
parent92cad5fa4bb4f7662574350df91196bb8017a820 (diff)
downloadtrusted-firmware-a-ad02a7596f73ea9f07ebc9e04970ab7e9961c868.tar.gz
xlat: Make function to calculate TCR PA bits public
This function can be useful to setup TCR_ELx by callers that don't use the translation tables library to setup the system registers related to them. By making it common, it can be reused whenever it is needed without duplicating code. Change-Id: Ibfada9e846d2a6cd113b1925ac911bb27327d375 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-rw-r--r--include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h5
-rw-r--r--lib/xlat_tables_v2/aarch64/xlat_tables_arch.c5
2 files changed, 7 insertions, 3 deletions
diff --git a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
index 7381bc829e..6021e4070d 100644
--- a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
+++ b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
@@ -16,6 +16,11 @@
#endif
/*
+ * Encode a Physical Address Space size for its use in TCR_ELx.
+ */
+unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr);
+
+/*
* In AArch64 state, the MMU may support 4 KB, 16 KB and 64 KB page
* granularity. For 4KB granularity, a level 0 table descriptor doesn't support
* block translation. For 16KB, the same thing happens to levels 0 and 1. For
diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
index eda38d341b..4331107940 100644
--- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
+++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
@@ -16,8 +16,7 @@
#include <xlat_tables_v2.h>
#include "../xlat_tables_private.h"
-static unsigned long long calc_physical_addr_size_bits(
- unsigned long long max_addr)
+unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr)
{
/* Physical address can't exceed 48 bits */
assert((max_addr & ADDR_MASK_48_TO_63) == 0);
@@ -252,7 +251,7 @@ void enable_mmu_arch(unsigned int flags,
* It is safer to restrict the max physical address accessible by the
* hardware as much as possible.
*/
- unsigned long long tcr_ps_bits = calc_physical_addr_size_bits(max_pa);
+ unsigned long long tcr_ps_bits = tcr_physical_addr_size_bits(max_pa);
#if IMAGE_EL == 1
assert(IS_IN_EL(1));