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authorHsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>2021-05-05 15:15:51 +0800
committerhsin-hsiung.wang <hsin-hsiung.wang@mediatek.com>2021-05-27 02:13:37 +0100
commit9ed4e6fb669b8fcafc4e8acfa6a36db305d27ac8 (patch)
tree488317de68306b47a3fa7f7c9294023601662294
parentc51afaff0d7eb5c5cb38efaefa2481148edf1115 (diff)
downloadtrusted-firmware-a-9ed4e6fb669b8fcafc4e8acfa6a36db305d27ac8.tar.gz
fix(plat/mediatek/pmic_wrap): update idle flow
Update idle flow in case of last read command timeout. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: Idb0552d70d59b23822c38269d0fa9fe9ac0d6975
-rw-r--r--plat/mediatek/common/drivers/pmic_wrap/pmic_wrap_init_v2.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/plat/mediatek/common/drivers/pmic_wrap/pmic_wrap_init_v2.c b/plat/mediatek/common/drivers/pmic_wrap/pmic_wrap_init_v2.c
index fca69130a4..d9a79c4949 100644
--- a/plat/mediatek/common/drivers/pmic_wrap/pmic_wrap_init_v2.c
+++ b/plat/mediatek/common/drivers/pmic_wrap/pmic_wrap_init_v2.c
@@ -26,12 +26,30 @@ static uint32_t pwrap_check_idle(void *wacs_register, uint32_t timeout_us)
while (retry != 0) {
udelay(WAIT_IDLE_POLLING_DELAY_US);
reg_rdata = mmio_read_32((uintptr_t)wacs_register);
- if (GET_WACS_FSM(reg_rdata) == SWINF_FSM_IDLE) {
+ /* if last read command timeout,clear vldclr bit
+ * read command state machine:FSM_REQ-->wfdle-->WFVLDCLR;
+ * write:FSM_REQ-->idle
+ */
+ switch (GET_WACS_FSM(reg_rdata)) {
+ case SWINF_FSM_WFVLDCLR:
+ mmio_write_32((uintptr_t)&mtk_pwrap->wacs2_vldclr, 0x1);
+ INFO("WACS_FSM = SWINF_FSM_WFVLDCLR\n");
+ break;
+ case SWINF_FSM_WFDLE:
+ INFO("WACS_FSM = SWINF_FSM_WFDLE\n");
+ break;
+ case SWINF_FSM_REQ:
+ INFO("WACS_FSM = SWINF_FSM_REQ\n");
+ break;
+ case SWINF_FSM_IDLE:
+ goto done;
+ default:
break;
}
retry--;
};
+done:
if (retry == 0) {
/* timeout */
return E_PWR_WAIT_IDLE_TIMEOUT;