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authorSoby Mathew <soby.mathew@arm.com>2019-09-13 12:09:21 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-09-13 12:09:21 +0000
commit42cdeb93080f2b54a75be14e4f5ee776872f3f0f (patch)
treeefb266d579ee70df877d411f0ccccb0696baf2c8
parente65d3f45d777f086388d13adf2ad8252d60a93a6 (diff)
parentebf851ed34eda0a4fcd87a155a13b02f3db8573c (diff)
downloadtrusted-firmware-a-42cdeb93080f2b54a75be14e4f5ee776872f3f0f.tar.gz
Merge "stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver" into integration
-rw-r--r--drivers/st/uart/aarch32/stm32_console.S28
-rw-r--r--plat/st/stm32mp1/bl2_plat_setup.c3
-rw-r--r--plat/st/stm32mp1/sp_min/sp_min_setup.c8
3 files changed, 15 insertions, 24 deletions
diff --git a/drivers/st/uart/aarch32/stm32_console.S b/drivers/st/uart/aarch32/stm32_console.S
index 39e449b29..ca3c1f618 100644
--- a/drivers/st/uart/aarch32/stm32_console.S
+++ b/drivers/st/uart/aarch32/stm32_console.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -138,34 +138,18 @@ func console_stm32_core_putc
/* Check the input parameter */
cmp r1, #0
beq putc_error
- /* Prepend '\r' to '\n' */
- cmp r0, #0xA
- bne 2f
-1:
- /* Check Transmit Data Register Empty */
-txe_loop_1:
- ldr r2, [r1, #USART_ISR]
- tst r2, #USART_ISR_TXE
- beq txe_loop_1
- mov r2, #0xD
- str r2, [r1, #USART_TDR]
- /* Check transmit complete flag */
-tc_loop_1:
- ldr r2, [r1, #USART_ISR]
- tst r2, #USART_ISR_TC
- beq tc_loop_1
-2:
+
/* Check Transmit Data Register Empty */
-txe_loop_2:
+txe_loop:
ldr r2, [r1, #USART_ISR]
tst r2, #USART_ISR_TXE
- beq txe_loop_2
+ beq txe_loop
str r0, [r1, #USART_TDR]
/* Check transmit complete flag */
-tc_loop_2:
+tc_loop:
ldr r2, [r1, #USART_ISR]
tst r2, #USART_ISR_TC
- beq tc_loop_2
+ beq tc_loop
bx lr
putc_error:
mov r0, #-1
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index 75ae372ae..c6aefe324 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -272,6 +272,9 @@ void bl2_el3_plat_arch_setup(void)
panic();
}
+ console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
+ CONSOLE_FLAG_CRASH | CONSOLE_FLAG_TRANSLATE_CRLF);
+
stm32mp_print_cpuinfo();
board_model = dt_get_board_model();
diff --git a/plat/st/stm32mp1/sp_min/sp_min_setup.c b/plat/st/stm32mp1/sp_min/sp_min_setup.c
index 417115b65..e10dfbfc0 100644
--- a/plat/st/stm32mp1/sp_min/sp_min_setup.c
+++ b/plat/st/stm32mp1/sp_min/sp_min_setup.c
@@ -129,16 +129,20 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
result = dt_get_stdout_uart_info(&dt_uart_info);
if ((result > 0) && (dt_uart_info.status != 0U)) {
+ unsigned int console_flags;
+
if (console_stm32_register(dt_uart_info.base, 0,
STM32MP_UART_BAUDRATE, &console) ==
0) {
panic();
}
+ console_flags = CONSOLE_FLAG_BOOT | CONSOLE_FLAG_CRASH |
+ CONSOLE_FLAG_TRANSLATE_CRLF;
#ifdef DEBUG
- console_set_scope(&console.console,
- CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
+ console_flags |= CONSOLE_FLAG_RUNTIME;
#endif
+ console_set_scope(&console.console, console_flags);
}
}