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authorDimitris Papastamos <dimitris.papastamos@arm.com>2018-06-11 11:07:58 +0100
committerDimitris Papastamos <dimitris.papastamos@arm.com>2018-06-11 14:18:06 +0100
commit42be6fc57e4f543a6a5a79f3a3d13192fb346fe2 (patch)
treeeae5d670a9ad9951ffd17cc7041713a836539f4c
parent608529aa2425a12212ecbda80927aee3621ba11b (diff)
downloadtrusted-firmware-a-42be6fc57e4f543a6a5a79f3a3d13192fb346fe2.tar.gz
Adjust BL2_AT_EL3 memory layout
For the BL2_AT_EL3 configuration, move BL2 higher up to make more space for BL31. Adjust the BL31 limit to be up to BL2 base. This is because BL2 is always resident for the BL2_AT_EL3 configuration and thus we cannot overlay it with BL31. Change-Id: I71e89863ed48f5159e8b619f49c7c73b253397aa Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
-rw-r--r--docs/firmware-design.rst4
-rw-r--r--include/plat/arm/common/arm_def.h12
2 files changed, 12 insertions, 4 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst
index 51f5b42eb2..e3500c27b0 100644
--- a/docs/firmware-design.rst
+++ b/docs/firmware-design.rst
@@ -516,8 +516,8 @@ This functionality can be tested with FVP loading the image directly
in memory and changing the address where the system jumps at reset.
For example:
- -C cluster0.cpu0.RVBAR=0x4020000
- --data cluster0.cpu0=bl2.bin@0x4020000
+ -C cluster0.cpu0.RVBAR=0x4022000
+ --data cluster0.cpu0=bl2.bin@0x4022000
With this configuration, FVP is like a platform of the first case,
where the Boot ROM jumps always to the same address. For simplification,
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 1f62ebe7db..d87fc16fe7 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -339,9 +339,9 @@
* BL2 specific defines.
******************************************************************************/
#if BL2_AT_EL3
-/* Put BL2 in the middle of the Trusted SRAM */
+/* Put BL2 towards the middle of the Trusted SRAM */
#define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \
- (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1))
+ (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1) + 0x2000)
#define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
#else
@@ -374,8 +374,16 @@
#define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
- PLAT_ARM_MAX_BL31_SIZE)
#define BL31_PROGBITS_LIMIT BL2_BASE
+/*
+ * For BL2_AT_EL3 make sure the BL31 can grow up until BL2_BASE. This is
+ * because in the BL2_AT_EL3 configuration, BL2 is always resident.
+ */
+#if BL2_AT_EL3
+#define BL31_LIMIT BL2_BASE
+#else
#define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
#endif
+#endif
#if defined(AARCH32) || JUNO_AARCH32_EL3_RUNTIME
/*******************************************************************************