| commit | 371648e1c76b5230bf8e153629064c02086365c9 | [log] [tgz] |
|---|---|---|
| author | Guo Yi <yguo@cavium.com> | Thu Dec 17 22:30:54 2020 +0000 |
| committer | Konstantin Porotchkin <kostap@marvell.com> | Tue Jun 01 17:44:21 2021 +0200 |
| tree | bcd3140b0b19911e9495307abdf26873c085656d | |
| parent | 73a3db718c6d0ca5066da2e8c9dd235a68eadf4a [diff] |
fix(plat/marvell/armada): select correct pcie reference clock source when comphy is in pcie mode, correct reference clock need be selected according to SAR register that reflect the CPx_MPP boot strapping pins. Either from external or from internal Signed-off-by: Guo Yi <yguo@cavium.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Change-Id: I99ed64a141e85174cc0f8e9dab5886ab2506efa1