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authorAndre Przywara <andre.przywara@arm.com>2020-04-09 11:27:21 +0100
committerAndre Przywara <andre.przywara@arm.com>2020-04-09 13:53:50 +0100
commita82ea1dbbf0d651d9fed35bf3a962cd8fce4b01c (patch)
treea2883d75407fa458e0225bc4f5f6918994d24c58
parent50d8cf26dc57bb453b1a52be646140bfea4aa591 (diff)
downloadtrusted-firmware-a-a82ea1dbbf0d651d9fed35bf3a962cd8fce4b01c.tar.gz
arm_fpga: Remove bogus timer initialisation
The arm_fpga platform code contains an dubious line to initialise some timer. On closer inspection this turn out to be bogus, as this was only needed on some special (older) FPGA board, and is actually not needed on the current model. Also the base address was wrong anyways. Remove the code entirely. Change-Id: I02e71aea645051b5addb42d972d7a79f04b81106 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-rw-r--r--plat/arm/board/arm_fpga/fpga_bl31_setup.c1
-rw-r--r--plat/arm/board/arm_fpga/fpga_def.h1
2 files changed, 0 insertions, 2 deletions
diff --git a/plat/arm/board/arm_fpga/fpga_bl31_setup.c b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
index d499379ee8..632949723b 100644
--- a/plat/arm/board/arm_fpga/fpga_bl31_setup.c
+++ b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
@@ -56,7 +56,6 @@ void bl31_platform_setup(void)
/* Write frequency to CNTCRL and initialize timer */
generic_delay_timer_init();
- mmio_write_32(FPGA_TIMER_BASE, ((1 << 8) | 1UL));
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
diff --git a/plat/arm/board/arm_fpga/fpga_def.h b/plat/arm/board/arm_fpga/fpga_def.h
index 56ee1663d3..dbdbe6f4d8 100644
--- a/plat/arm/board/arm_fpga/fpga_def.h
+++ b/plat/arm/board/arm_fpga/fpga_def.h
@@ -36,6 +36,5 @@
#define PLAT_FPGA_CRASH_UART_CLK_IN_HZ PLAT_FPGA_BOOT_UART_CLK_IN_HZ
#define FPGA_TIMER_FREQUENCY 10000000
-#define FPGA_TIMER_BASE 0x2a830000
#endif