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authorJohn Tsichritzis <john.tsichritzis@arm.com>2019-03-15 15:40:27 +0000
committerJohn Tsichritzis <john.tsichritzis@arm.com>2019-03-15 15:40:27 +0000
commitc4187c9c4b352f48252afe0ee30fa93d84e692a5 (patch)
treecedb031ea7a3537713e349dcdf4dfb4fe7fbc482
parent620d9832f96ffcaf86d38b703ca913438d6eea7c (diff)
downloadtrusted-firmware-a-c4187c9c4b352f48252afe0ee30fa93d84e692a5.tar.gz
Fix wrong MIDR_EL1 value for Neoverse E1
Change-Id: I75ee39d78c81ecb528a671c0cfadfc2fe7b5d818 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
-rw-r--r--include/lib/cpus/aarch64/neoverse_e1.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/lib/cpus/aarch64/neoverse_e1.h b/include/lib/cpus/aarch64/neoverse_e1.h
index 7084604806..96b4661dbe 100644
--- a/include/lib/cpus/aarch64/neoverse_e1.h
+++ b/include/lib/cpus/aarch64/neoverse_e1.h
@@ -9,7 +9,7 @@
#include <lib/utils_def.h>
-#define NEOVERSE_E1_MIDR U(0x410FD060)
+#define NEOVERSE_E1_MIDR U(0x410FD4A0)
/*******************************************************************************
* CPU Extended Control register specific definitions.