diff options
author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-05-09 10:04:08 +0100 |
---|---|---|
committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-05-09 17:43:46 +0100 |
commit | 33ce14f04ff6dc91488d9332970bf9ce176d1b63 (patch) | |
tree | 763341a5f4819e2f5a2a50506860c9504bd8c306 | |
parent | a21185832f12f92abb8f8f86b96a12d1e0f79979 (diff) | |
download | trusted-firmware-a-33ce14f04ff6dc91488d9332970bf9ce176d1b63.tar.gz |
juno: Increase L2RAM wait state to support higher cluster frequenciesv0.3-Juno-0.3
Change-Id: I7f1fb4ed01ed73de1196ca17ed6fc1524478ec75
-rw-r--r-- | arch/aarch64/cpu/cpu_helpers.S | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/aarch64/cpu/cpu_helpers.S b/arch/aarch64/cpu/cpu_helpers.S index 009f08acfd..c05262312e 100644 --- a/arch/aarch64/cpu/cpu_helpers.S +++ b/arch/aarch64/cpu/cpu_helpers.S @@ -46,12 +46,19 @@ cpu_reset_handler: ; .type cpu_reset_handler, %function lsr x0, x0, #MIDR_PN_SHIFT and x0, x0, #MIDR_PN_MASK cmp x0, #MIDR_PN_A57 - b.eq smp_setup_begin + b.eq a57_setup_begin cmp x0, #MIDR_PN_A53 - b.ne smp_setup_end + b.eq smp_setup_begin + b smp_setup_end + +a57_setup_begin: + mov x0, #0x082 + msr s3_1_c11_c0_2, x0 + smp_setup_begin: bl read_cpuectlr orr x0, x0, #CPUECTLR_SMP_BIT bl write_cpuectlr + smp_setup_end: ret x19 |