diff options
| author | Lionel Debieve <lionel.debieve@st.com> | 2019-05-17 16:01:18 +0200 |
|---|---|---|
| committer | Yann Gautier <yann.gautier@st.com> | 2020-10-13 11:27:40 +0200 |
| commit | 8ccf4954bf747099e999b111ab0c19cc7186b986 (patch) | |
| tree | 7d0cbbf68d9455ff7df91e3441cf945d09f5fc73 | |
| parent | ffb3f2771340a75c713c992a11501f963ddc310f (diff) | |
| download | trusted-firmware-a-8ccf4954bf747099e999b111ab0c19cc7186b986.tar.gz | |
stm32mp1: add support for new SoC profiles
Update to support new part numbers.
Add new STM32 MPUs Part = STM32MP151F, STM32MP153F, STM32MP157F,
STM32MP151D, STM32MP153D, STM32MP157D
The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :
- A Basic + Cortex-A7 @ 650 MHz
- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D Basic + Cortex-A7 @ 800 MHz
- F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
Remove useless variable in stm32mp_is_single_core().
Change-Id: Id30c836af986c6340c91efa8a7ae9480a2827089
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
| -rw-r--r-- | plat/st/stm32mp1/stm32mp1_def.h | 6 | ||||
| -rw-r--r-- | plat/st/stm32mp1/stm32mp1_private.c | 28 |
2 files changed, 28 insertions, 6 deletions
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 825df2cae7..37b9125d8f 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -37,6 +37,12 @@ #define STM32MP153A_PART_NB U(0x05000025) #define STM32MP151C_PART_NB U(0x0500002E) #define STM32MP151A_PART_NB U(0x0500002F) +#define STM32MP157F_PART_NB U(0x05000080) +#define STM32MP157D_PART_NB U(0x05000081) +#define STM32MP153F_PART_NB U(0x050000A4) +#define STM32MP153D_PART_NB U(0x050000A5) +#define STM32MP151F_PART_NB U(0x050000AE) +#define STM32MP151D_PART_NB U(0x050000AF) #define STM32MP1_REV_B U(0x2000) #define STM32MP1_REV_Z U(0x2001) diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c index 499766d3d2..29c4ad7ce9 100644 --- a/plat/st/stm32mp1/stm32mp1_private.c +++ b/plat/st/stm32mp1/stm32mp1_private.c @@ -220,6 +220,24 @@ void stm32mp_print_cpuinfo(void) case STM32MP151A_PART_NB: cpu_s = "151A"; break; + case STM32MP157F_PART_NB: + cpu_s = "157F"; + break; + case STM32MP157D_PART_NB: + cpu_s = "157D"; + break; + case STM32MP153F_PART_NB: + cpu_s = "153F"; + break; + case STM32MP153D_PART_NB: + cpu_s = "153D"; + break; + case STM32MP151F_PART_NB: + cpu_s = "151F"; + break; + case STM32MP151D_PART_NB: + cpu_s = "151D"; + break; default: cpu_s = "????"; break; @@ -323,7 +341,6 @@ void stm32mp_print_boardinfo(void) bool stm32mp_is_single_core(void) { uint32_t part_number; - bool ret = false; if (get_part_number(&part_number) < 0) { ERROR("Invalid part number, assume single core chip"); @@ -333,14 +350,13 @@ bool stm32mp_is_single_core(void) switch (part_number) { case STM32MP151A_PART_NB: case STM32MP151C_PART_NB: - ret = true; - break; + case STM32MP151D_PART_NB: + case STM32MP151F_PART_NB: + return true; default: - break; + return false; } - - return ret; } /* Return true when device is in closed state */ |