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author | Vignesh Radhakrishnan <vigneshr@nvidia.com> | 2017-11-04 16:36:23 -0700 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-11-28 11:14:21 -0800 |
commit | 4b412b507a1648e00fb68b06b8cbe88ac9239317 (patch) | |
tree | 66e31ac2dea0913f6d6194c3f8ae892025b7d9a0 | |
parent | 6eb3c188abf8bcccc3f833972084fbf796e4eb02 (diff) | |
download | trusted-firmware-a-4b412b507a1648e00fb68b06b8cbe88ac9239317.tar.gz |
Tegra194: mce: fix cg_cstate encoding format
This patch does the following:
- cstate_info variable is used to pass on requested cstate to mce
- Currently, cg_cstate is encoded using 2 bits(bits 8, 9) in cstate_info
- cg_cstate values can range from 0 to 7, with 7 representing cg7
- Thus, cg_cstate is to be encoded using 3 bits (val: 0-7)
- Fix this, as per ISS and ensure bits 8, 9, 10 are used
Change-Id: Idff207e2a88b2f4654e4a956c27054bf5e8f69bb
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
-rw-r--r-- | plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h index 966c90bb35..1970a2d173 100644 --- a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h +++ b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h @@ -16,7 +16,7 @@ #define CLUSTER_CSTATE_MASK 0x7U #define CLUSTER_CSTATE_SHIFT 0X0U #define CLUSTER_CSTATE_UPDATE_BIT (1U << 7) -#define CCPLEX_CSTATE_MASK 0x3U +#define CCPLEX_CSTATE_MASK 0x7U #define CCPLEX_CSTATE_SHIFT 8U #define CCPLEX_CSTATE_UPDATE_BIT (1U << 15) #define SYSTEM_CSTATE_MASK 0xFU diff --git a/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c b/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c index 498415a29e..96b2b9113e 100644 --- a/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c +++ b/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c @@ -96,7 +96,7 @@ void nvg_set_wake_time(uint32_t wake_time) * * NVGDATA[0:2]: SW(RW), CLUSTER_CSTATE * NVGDATA[7]: SW(W), update cluster flag - * NVGDATA[8:9]: SW(RW), CG_CSTATE + * NVGDATA[8:10]: SW(RW), CG_CSTATE * NVGDATA[15]: SW(W), update ccplex flag * NVGDATA[16:19]: SW(RW), SYSTEM_CSTATE * NVGDATA[23]: SW(W), update system flag |