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authorManish Pandey <manish.pandey2@arm.com>2020-10-09 14:50:34 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-10-09 14:50:34 +0000
commitf224d3c916343b57d91d809096fa63ab3cae2fe8 (patch)
tree75db5c7ac8ccb3e4fb8db512667fd3b9b304977f
parent210ac186ad4f638287c488c4e45958747c91a1b1 (diff)
parent44966000ec11e22ae2d580d0291d6e1cd613895d (diff)
downloadtrusted-firmware-a-f224d3c916343b57d91d809096fa63ab3cae2fe8.tar.gz
Merge "drivers: stm32_fmc2_nand: fix incorrect error detection" into integration
-rw-r--r--drivers/st/fmc/stm32_fmc2_nand.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/st/fmc/stm32_fmc2_nand.c b/drivers/st/fmc/stm32_fmc2_nand.c
index dbbeee4c5b..5eee4f3b95 100644
--- a/drivers/st/fmc/stm32_fmc2_nand.c
+++ b/drivers/st/fmc/stm32_fmc2_nand.c
@@ -37,6 +37,7 @@
#define FMC2_PATT 0x8CU
#define FMC2_HECCR 0x94U
#define FMC2_BCHISR 0x254U
+#define FMC2_BCHICR 0x258U
#define FMC2_BCHDSR0 0x27CU
#define FMC2_BCHDSR1 0x280U
#define FMC2_BCHDSR2 0x284U
@@ -82,6 +83,8 @@
#define FMC2_PATT_DEFAULT 0x0A0A0A0AU
/* FMC2_BCHISR register */
#define FMC2_BCHISR_DERF BIT(1)
+/* FMC2_BCHICR register */
+#define FMC2_BCHICR_CLEAR_IRQ GENMASK_32(4, 0)
/* FMC2_BCHDSR0 register */
#define FMC2_BCHDSR0_DUE BIT(0)
#define FMC2_BCHDSR0_DEF BIT(1)
@@ -500,6 +503,7 @@ static void stm32_fmc2_hwctl(struct nand_device *nand)
if (nand->ecc.max_bit_corr != FMC2_ECC_HAM) {
mmio_clrbits_32(fmc2_base() + FMC2_PCR, FMC2_PCR_WEN);
+ mmio_write_32(fmc2_base() + FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ);
}
stm32_fmc2_set_ecc(true);