aboutsummaryrefslogtreecommitdiff
path: root/tftf/framework/aarch64/exceptions.S
blob: 37c5218b7eafe8909ff107dcbef28c47699145ce (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
/*
 * Copyright (c) 2018, Arm Limited. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <asm_macros.S>

	.globl	tftf_vector

/* Exception vector code for unhandled exceptions. Loops forever. */
.macro unhandled_exception name
	vector_entry \name
	b \name
	end_vector_entry \name
.endm

vector_base tftf_vector

	/*
	 * Current EL with SP0 : 0x0 - 0x200.
	 */
unhandled_exception SynchronousExceptionSP0
unhandled_exception IrqSP0
unhandled_exception FiqSP0
unhandled_exception SErrorSP0

	/*
	 * Current EL with SPx : 0x200 - 0x400.
	 */
unhandled_exception SynchronousExceptionSPx

vector_entry IrqSPx
	b	irq_vector_entry
end_vector_entry IrqSPx

unhandled_exception FiqSPx
unhandled_exception SErrorSPx

	/*
	 * Lower EL using AArch64 : 0x400 - 0x600.
	 */
unhandled_exception SynchronousExceptionA64
unhandled_exception IrqA64
unhandled_exception FiqA64
unhandled_exception SErrorA64

	/*
	 * Lower EL using AArch32 : 0x600 - 0x800.
	 */
unhandled_exception SynchronousExceptionA32
unhandled_exception IrqA32
unhandled_exception FiqA32
unhandled_exception SErrorA32

/*
 * Exceptions will always be from the same exception level so no need to save
 * and restore SPSR.
 */
.macro save_gp_regs
	stp	x0, x1, [sp, #0x0]
	stp	x2, x3, [sp, #0x10]
	stp	x4, x5, [sp, #0x20]
	stp	x6, x7, [sp, #0x30]
	stp	x8, x9, [sp, #0x40]
	stp	x10, x11, [sp, #0x50]
	stp	x12, x13, [sp, #0x60]
	stp	x14, x15, [sp, #0x70]
	stp	x16, x17, [sp, #0x80]
	stp	x18, x19, [sp, #0x90]
	stp	x20, x21, [sp, #0xa0]
	stp	x22, x23, [sp, #0xb0]
	stp	x24, x25, [sp, #0xc0]
	stp	x26, x27, [sp, #0xd0]
	stp	x28, x29, [sp, #0xe0]
	mrs     x0, sp_el0
	stp	x30, x0, [sp, #0xf0]
.endm

.macro restore_gp_regs
	ldp	x30, x0, [sp, #0xf0]
	msr	sp_el0, x0
	ldp	x28, x29, [sp, #0xe0]
	ldp	x26, x27, [sp, #0xd0]
	ldp	x24, x25, [sp, #0xc0]
	ldp	x22, x23, [sp, #0xb0]
	ldp	x20, x21, [sp, #0xa0]
	ldp	x18, x19, [sp, #0x90]
	ldp	x16, x17, [sp, #0x80]
	ldp	x14, x15, [sp, #0x70]
	ldp	x12, x13, [sp, #0x60]
	ldp	x10, x11, [sp, #0x50]
	ldp	x8, x9, [sp, #0x40]
	ldp	x6, x7, [sp, #0x30]
	ldp	x4, x5, [sp, #0x20]
	ldp	x2, x3, [sp, #0x10]
	ldp	x0, x1, [sp, #0x0]
.endm

func irq_vector_entry
	sub	sp, sp, #0x100
	save_gp_regs
	bl	tftf_irq_handler_dispatcher
	restore_gp_regs
	add	sp, sp, #0x100
	eret
endfunc irq_vector_entry