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/*
 * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 * This file is a Partition Manifest (PM) for a minimal Secure Partition (SP)
 * that has additional optional properties defined.
 *
 */

/dts-v1/;

/ {
	compatible = "arm,ffa-manifest-1.0";

	/* Properties */
	description = "Base-1";
	ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
	uuid = <0xb4b5671e 0x4a904fe1 0xb81ffb13 0xdae1dacb>;
	id = <1>;
	auxiliary-id = <0xae>;
	stream-endpoint-ids = <0 1 2 3>;
	execution-ctx-count = <8>;
	exception-level = <2>; /* S-EL1 */
	execution-state = <0>; /* AARCH64 */
	load-address = <0x7000000>;
	entrypoint-offset = <0x00001000>;
	xlat-granule = <0>; /* 4KiB */
	boot-order = <0>;
	messaging-method = <11>; /* Direct messaging with managed exit */
	run-time-model = <0>; /* Run to completion */

	/* Boot protocol */
	gp-register-num = <0x0>;

	rx_tx-info {
		compatible = "arm,ffa-manifest-rx_tx-buffer";
		rx-buffer = <&rxbuffer>;
		tx-buffer = <&txbuffer>;
	};

	memory-regions {
		compatible = "arm,ffa-manifest-memory-regions";

		rxbuffer: rx-buffer {
			description = "rx-buffer";
			pages-count = <1>;
			base-address = <0x00000000 0x7300000>;
			attributes = <0x1>; /* read-only */
		};

		txbuffer: tx-buffer {
			description = "tx-buffer";
			pages-count = <1>;
			base-address = <0x00000000 0x7301000>;
			attributes = <0x3>; /* read-write */
		};

		/* Without optional base-address */
		test-memory {
			description = "test-memory";
			pages-count = <4>;
			attributes = <0x7>; /* read-write-execute */
		};

		/*
		 * Scratch memory used for the purpose of testing SMMUv3 driver
		 * through Cactus SP
		 */
		smmuv3-memcpy-src {
			description = "smmuv3-memcpy-source";
			pages-count = <4>;
			base-address = <0x00000000 0x7400000>;
			attributes = <0x3>; /* read-write */
		};

		smmuv3-memcpy-dst {
			description = "smmuv3-memcpy-destination";
			pages-count = <4>;
			base-address = <0x00000000 0x7404000>;
			attributes = <0x3>; /* read-write */
		};
	};

	device-regions {
		compatible = "arm,ffa-manifest-device-regions";

		uart2 {
			base-address = <0x00000000 0x1c0b0000>;
			pages-count = <1>;
			attributes = <0x3>; /* read-write */
		};

		smmuv3-testengine {
			/*
			 * SMMUv3TestEngine is a DMA IP modeled in the
			 * Base-RevC FVP Model.
			 * User Frame: 0x2bfe0000
			 * Privileged Frame: 0x2bff0000
			 */
			base-address = <0x00000000 0x2bfe0000>;
			pages-count = <32>; /* Two 64KB pages */
			attributes = <0x3>; /* read-write */
			smmu-id = <0>;
			stream-ids = <0x0 0x1>;
		};

		test-reg {
			/* Dummy Values */
			base-address = <0x00000000 0x22000000>;
			pages-count = <64>;
			attributes = <0x3>; /* read-write */
			reg = <0x10000008 0x00000001 1>;
			smmu-id = <1>;
			stream-ids = <0x0 0x1>;
			interrupts = <0x2 0x3>,
					<0x4 0x5>;
			exclusive-access;
		};
	};

};