aboutsummaryrefslogtreecommitdiff
path: root/lib/extensions/sme/aarch64/sme.c
blob: 28ddcd6641802102988449d5d135c1fccc78535f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
/*
 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <stdbool.h>
#include <stdio.h>

#include <arch.h>
#include <arch_helpers.h>
#include <lib/extensions/sme.h>

#ifdef __aarch64__

/*
 * feat_sme_supported
 *   Check if SME is supported on this platform.
 * Return
 *   true if SME supported, false if not.
 */
bool feat_sme_supported(void)
{
	uint64_t features;

	features = read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_SME_SHIFT;
	return (features & ID_AA64PFR1_EL1_SME_MASK) != 0U;
}

/*
 * feat_sme_fa64_supported
 *  Check if FEAT_SME_FA64 is supported.
 * Return
 *  True if supported, false if not.
 */
bool feat_sme_fa64_supported(void)
{
	uint64_t features;

	features = read_id_aa64smfr0_el1();
	return (features & ID_AA64SMFR0_EL1_FA64_BIT) != 0U;
}

/*
 * sme_enable
 *   Enable SME for nonsecure use at EL2 for TFTF cases.
 * Return
 *   0 if successful.
 */
int sme_enable(void)
{
	u_register_t reg;

	/* Make sure SME is supported. */
	if (!feat_sme_supported()) {
		return -1;
	}

	/*
	 * Make sure SME accesses don't cause traps by setting appropriate fields
	 * in CPTR_EL2.
	 */
	reg = read_cptr_el2();
	if ((read_hcr_el2() & HCR_E2H_BIT) == 0U) {
		/* When HCR_EL2.E2H == 0, clear TSM bit in CPTR_EL2. */
		reg = reg & ~CPTR_EL2_TSM_BIT;
	} else {
		/* When HCR_EL2.E2H == 1, set SMEN bits in CPTR_EL2. */
		reg = reg | (CPTR_EL2_SMEN_MASK << CPTR_EL2_SMEN_SHIFT);
	}
	write_cptr_el2(reg);

	return 0;
}

/*
 * sme_smstart
 *   This function enables streaming mode and optinally enables ZA array access
 *   at the same time.
 * Parameters
 *   enable_za: If set, ZA access is enabled.  If cleared, ZA bit is untouched.
 */
void sme_smstart(bool enable_za)
{
	u_register_t svcr = SVCR_SM_BIT;

	if (enable_za) {
		svcr |= SVCR_ZA_BIT;
	}

	write_svcr(read_svcr() | svcr);
}

/*
 * sme_smstop
 *   This function disables streaming mode OR disables ZA array access but not
 *   both.  It might seem strange but this is the functionality of the SMSTOP
 *   assembly instruction.
 * Parameters
 *   disable_za: If set, ZA access is disabled but streaming mode is not
 *               affected.  If clear, streaming mode is exited and ZA bit is
 *               left alone.
 */
void sme_smstop(bool disable_za)
{
	u_register_t svcr;

	if (disable_za) {
		svcr = ~SVCR_ZA_BIT;
	} else {
		svcr = ~SVCR_SM_BIT;
	}

	write_svcr(read_svcr() & svcr);
}

#endif /* __aarch64__ */