Age | Commit message (Expand) | Author |
---|---|---|
2020-10-28 | aarch64: enable SError aborts | Varun Wadekar |
2020-01-30 | TF-TF: Store boot parameters | Alexei Fedorov |
2019-12-12 | TFTF: Add missing D-cache invalidation | Alexei Fedorov |
2019-04-12 | Makefile: Enable strict align arch minor version | Joel Hutton |
2019-04-01 | Introduce test for SVE support | Ambroise Vincent |
2019-01-24 | Dump some registers when hitting an unexpected exception | Sandrine Bailleux |
2019-01-24 | Improve readability of TFTF exceptions code | Sandrine Bailleux |
2019-01-14 | Rework IRQ vector code | Sandrine Bailleux |
2019-01-14 | Add CFI debug info to vector entries | Sandrine Bailleux |
2019-01-14 | Fix comments in AArch64 exceptions code | Sandrine Bailleux |
2019-01-07 | Explain why we set HCR.TGE bit | Sandrine Bailleux |
2018-12-18 | Rework TFTF AArch64 entry point code | Sandrine Bailleux |
2018-11-26 | Expand MPID_MASK define to affinity level 3 | Antonio Nino Diaz |
2018-10-25 | Disable hardware alignment checking | Sandrine Bailleux |
2018-10-10 | Trusted Firmware-A Tests, version 2.0v2.0 | Sandrine Bailleux |