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-rw-r--r--tftf/framework/aarch64/arch.c4
-rw-r--r--tftf/tests/plat/nvidia/tegra194/serror_handler.S6
-rw-r--r--tftf/tests/plat/nvidia/tegra194/test_ras_uncorrectable.c4
-rw-r--r--tftf/tests/tests-tegra194.mk3
-rw-r--r--tftf/tests/tests-tegra194.xml27
5 files changed, 27 insertions, 17 deletions
diff --git a/tftf/framework/aarch64/arch.c b/tftf/framework/aarch64/arch.c
index c3f57b8c..56369ae8 100644
--- a/tftf/framework/aarch64/arch.c
+++ b/tftf/framework/aarch64/arch.c
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -10,6 +11,9 @@ void tftf_arch_setup(void)
{
/* Do not try to configure EL2 if TFTF is running at NS-EL1 */
if (IS_IN_EL2()) {
+ /* Enable asynchronous SError aborts to EL2 */
+ enable_serror();
+
/*
* Route physical interrupts to EL2 regardless of the value of
* the IMO/FMO bits. Without this, interrupts would not be taken
diff --git a/tftf/tests/plat/nvidia/tegra194/serror_handler.S b/tftf/tests/plat/nvidia/tegra194/serror_handler.S
index f040e5d4..5cbe39a8 100644
--- a/tftf/tests/plat/nvidia/tegra194/serror_handler.S
+++ b/tftf/tests/plat/nvidia/tegra194/serror_handler.S
@@ -8,11 +8,11 @@
#include <asm_macros.S>
#include <sdei.h>
- .globl serror_sdei_event_handler
+ .globl tegra194_serror_sdei_event_handler
/*
* SDEI event handler for SErrors.
*/
-func serror_sdei_event_handler
+func tegra194_serror_sdei_event_handler
stp x29, x30, [sp, #-16]!
bl sdei_handler
ldp x29, x30, [sp], #16
@@ -20,4 +20,4 @@ func serror_sdei_event_handler
mov x1, xzr
smc #0
b .
-endfunc serror_sdei_event_handler
+endfunc tegra194_serror_sdei_event_handler
diff --git a/tftf/tests/plat/nvidia/tegra194/test_ras_uncorrectable.c b/tftf/tests/plat/nvidia/tegra194/test_ras_uncorrectable.c
index b52a35c9..d7316255 100644
--- a/tftf/tests/plat/nvidia/tegra194/test_ras_uncorrectable.c
+++ b/tftf/tests/plat/nvidia/tegra194/test_ras_uncorrectable.c
@@ -23,7 +23,7 @@
static volatile uint64_t fault_received;
/* SDEI handler to receive RAS UC errors */
-extern int serror_sdei_event_handler(int ev, uint64_t arg);
+extern int tegra194_serror_sdei_event_handler(int ev, uint64_t arg);
/* NVIDIA Pseudo fault generation registers */
#define T194_ERXPFGCTL_EL1 S3_0_C15_C1_4
@@ -234,7 +234,7 @@ static void sdei_register_for_event(int event_id)
int64_t ret = 0;
/* Register SDEI handler */
- ret = sdei_event_register(event_id, serror_sdei_event_handler, 0,
+ ret = sdei_event_register(event_id, tegra194_serror_sdei_event_handler, 0,
SDEI_REGF_RM_PE, read_mpidr_el1());
if (ret < 0)
tftf_testcase_printf("SDEI event register failed: 0x%llx\n",
diff --git a/tftf/tests/tests-tegra194.mk b/tftf/tests/tests-tegra194.mk
index a8674125..ef6d8487 100644
--- a/tftf/tests/tests-tegra194.mk
+++ b/tftf/tests/tests-tegra194.mk
@@ -13,3 +13,6 @@ TESTS_SOURCES += $(addprefix tftf/tests/plat/nvidia/tegra194/, \
test_ras_uncorrectable.c \
serror_handler.S \
)
+
+include tftf/tests/tests-standard.mk
+TESTS_SOURCES += $(sort ${TESTS_SOURCES})
diff --git a/tftf/tests/tests-tegra194.xml b/tftf/tests/tests-tegra194.xml
index 173d3642..d07e411b 100644
--- a/tftf/tests/tests-tegra194.xml
+++ b/tftf/tests/tests-tegra194.xml
@@ -6,15 +6,18 @@
SPDX-License-Identifier: BSD-3-Clause
-->
-<testsuites>
- <testsuite name="Tegra SiP tests" description="SiP tests for Tegra platforms">
- <testcase name="Video Memory Configuration test" function="test_sip_videomem_incorrect_inputs" />
- <testcase name="Video Memory Resize test" function="test_sip_videomem_resize" />
- <testcase name="Read SMMU_PER register contents test" function="test_get_smmu_per" />
- </testsuite>
- <testsuite name="Tegra194 platform tests" description="Tests for Tegra194 platforms">
- <testcase name="RAS corrected error test" function="test_ras_corrected" />
- <testcase name="RAS uncorrectable error test" function="test_ras_uncorrectable" />
- </testsuite>
-
-</testsuites>
+<document>
+ <!-- External reference to standard tests files. -->
+ <xi:include xmlns:xi="http://www.w3.org/2001/XInclude" href="tests-standard.xml" />
+ <testsuites>
+ <testsuite name="Tegra SiP tests" description="SiP tests for Tegra platforms">
+ <testcase name="Video Memory Configuration test" function="test_sip_videomem_incorrect_inputs" />
+ <testcase name="Video Memory Resize test" function="test_sip_videomem_resize" />
+ <testcase name="Read SMMU_PER register contents test" function="test_get_smmu_per" />
+ </testsuite>
+ <testsuite name="Tegra194 platform tests" description="Tests for Tegra194 platforms">
+ <testcase name="RAS corrected error test" function="test_ras_corrected" />
+ <testcase name="RAS uncorrectable error test" function="test_ras_uncorrectable" />
+ </testsuite>
+ </testsuites>
+</document>