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-rw-r--r--spm/ivy/shim/shim_main.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/spm/ivy/shim/shim_main.c b/spm/ivy/shim/shim_main.c
index f03a52f98..1d6c72393 100644
--- a/spm/ivy/shim/shim_main.c
+++ b/spm/ivy/shim/shim_main.c
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -93,12 +94,12 @@ int shim_main(void)
/* Initialise console */
set_putc_impl(HVC_CALL_AS_STDOUT);
- INFO("Booting S-EL1 Shim\n");
-
/* Configure and enable Stage-1 MMU, enable D-Cache */
shim_plat_configure_mmu();
enable_mmu_el1(0);
+ INFO("Booting S-EL1 Shim\n");
+
shim_print_memory_layout();
return 0;