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authorManish Pandey <manish.pandey2@arm.com>2020-10-26 16:57:41 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-10-26 16:57:41 +0000
commitb3bcf77a65880049e40fa6f1b764a19dbd9faead (patch)
treed436fa71407df1bce7736a624b31719b192e6559 /tftf
parent861cd6dee3fe51e83b10ba08480e63761a06f1b4 (diff)
parent42f4d19069f4520d661a4e2907c2f287930eab51 (diff)
downloadtf-a-tests-b3bcf77a65880049e40fa6f1b764a19dbd9faead.tar.gz
Merge changes from topic "tests-from-downstream-10082020"
* changes: Tegra194: support GET_SMMU_PER testing Tegra194: introduce tests to verify the Video Memory resize interface Tegra194: skip sub-test to validate EL3 power state parsing timers: remove dependency on SYS_CNT_BASE1
Diffstat (limited to 'tftf')
-rw-r--r--tftf/framework/timer/timer_framework.c4
-rw-r--r--tftf/tests/framework_validation_tests/test_timer_framework.c4
-rw-r--r--tftf/tests/plat/nvidia/common/test_sip.c223
-rw-r--r--tftf/tests/tests-tegra194.mk4
-rw-r--r--tftf/tests/tests-tegra194.xml7
5 files changed, 237 insertions, 5 deletions
diff --git a/tftf/framework/timer/timer_framework.c b/tftf/framework/timer/timer_framework.c
index d856abe3..49fd07f3 100644
--- a/tftf/framework/timer/timer_framework.c
+++ b/tftf/framework/timer/timer_framework.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -60,7 +60,7 @@ static irq_handler_t timer_handler[PLATFORM_CORE_COUNT];
static inline unsigned long long get_current_time_ms(void)
{
assert(systicks_per_ms);
- return mmio_read_64(SYS_CNT_BASE1 + CNTPCT_LO) / systicks_per_ms;
+ return syscounter_read() / systicks_per_ms;
}
static inline unsigned long long get_current_prog_time(void)
diff --git a/tftf/tests/framework_validation_tests/test_timer_framework.c b/tftf/tests/framework_validation_tests/test_timer_framework.c
index 0bd2985f..47647e78 100644
--- a/tftf/tests/framework_validation_tests/test_timer_framework.c
+++ b/tftf/tests/framework_validation_tests/test_timer_framework.c
@@ -423,7 +423,7 @@ static test_result_t do_stress_test(void)
tftf_send_event(&cpu_ready[core_pos]);
- end_time = mmio_read_64(SYS_CNT_BASE1 + CNTPCT_LO) + read_cntfrq_el0() * 10;
+ end_time = read_cntpct_el0() + read_cntfrq_el0() * 10;
/* Construct the state-id for power down */
ret = tftf_psci_make_composite_state_id(MPIDR_AFFLVL0,
@@ -441,7 +441,7 @@ static test_result_t do_stress_test(void)
}
do {
- current_time = mmio_read_64(SYS_CNT_BASE1 + CNTPCT_LO);
+ current_time = read_cntpct_el0();
if (current_time > end_time)
break;
diff --git a/tftf/tests/plat/nvidia/common/test_sip.c b/tftf/tests/plat/nvidia/common/test_sip.c
new file mode 100644
index 00000000..48d4186d
--- /dev/null
+++ b/tftf/tests/plat/nvidia/common/test_sip.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch_helpers.h>
+#include <debug.h>
+#include <smccc.h>
+#include <tftf_lib.h>
+#include <xlat_tables_v2.h>
+
+#include <platform_def.h>
+
+/*******************************************************************************
+ * Common Tegra SiP SMCs
+ ******************************************************************************/
+#define TEGRA_SIP_NEW_VIDEOMEM_REGION 0x82000003ULL
+#define TEGRA_SIP_GET_SMMU_PER 0xC200FF00ULL
+
+/*
+ * @Test_Aim@ Test to issue VideoMem SiP SMC function IDs.
+ *
+ * This test runs on the lead CPU and issues TEGRA_SIP_NEW_VIDEOMEM_REGION
+ * SMC to resize the memory region.
+ */
+test_result_t test_sip_videomem_resize(void)
+{
+ uint32_t size_in_bytes = (4U << 20);
+ uint32_t offset = (8U << 20);
+ uint64_t vidmem_base = DRAM_END, mem;
+ uint64_t buf[] = { 0xCAFEBABE, 0xCAFEBABE, 0xCAFEBABE, 0xCAFEBABE };
+ smc_args args = { TEGRA_SIP_NEW_VIDEOMEM_REGION, vidmem_base, size_in_bytes };
+ smc_ret_values ret;
+ test_result_t result = TEST_RESULT_SUCCESS;
+ int err;
+
+ /* Map dummy memory region for the test */
+ err = mmap_add_dynamic_region(vidmem_base, vidmem_base, size_in_bytes << 2,
+ MT_DEVICE | MT_RW | MT_NS | MT_EXECUTE_NEVER);
+ if (err != 0) {
+ tftf_testcase_printf("%s: could not map memory (%d)\n", __func__, err);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* copy sample data before setting up the memory protections */
+ memcpy((char *)vidmem_base, (void *)buf, sizeof(buf));
+ flush_dcache_range(vidmem_base, sizeof(buf));
+
+ /* Issue the SMC to program videomem and expect success */
+ ret = tftf_smc(&args);
+ if (ret.ret0 != 0UL) {
+ tftf_testcase_printf("%s failed. Expected 0, received %ld\n",
+ __func__, (long int)ret.ret0);
+ result = TEST_RESULT_FAIL;
+ goto exit;
+ }
+
+ /* copy sample data before setting up the memory protections */
+ memcpy((char *)vidmem_base + offset, (void *)buf, sizeof(buf));
+ flush_dcache_range(vidmem_base + offset, sizeof(buf));
+
+ /* Issue request to "move" the protected memory region */
+ args.arg1 = vidmem_base + offset;
+ args.arg2 = (u_register_t)size_in_bytes;
+ ret = tftf_smc(&args);
+ if (ret.ret0 != 0UL) {
+ tftf_testcase_printf("%s failed. Expected 0, received %ld\n",
+ __func__, (long int)ret.ret0);
+ result = TEST_RESULT_FAIL;
+ goto exit;
+ }
+
+ /* Verify that memory in the open has been cleared */
+ mem = vidmem_base;
+ for (unsigned int i = 0U; i < (size_in_bytes / 8); i++, mem += 8) {
+ if (*(uint64_t *)(void *)mem != 0ULL) {
+ tftf_testcase_printf("%s failed. Memory is non-zero (%llx:%llx)\n",
+ __func__, mem, *(uint64_t *)(void *)mem);
+ result = TEST_RESULT_FAIL;
+ goto exit;
+ }
+ }
+
+ /* copy sample data before setting up the memory protections */
+ memcpy((char *)vidmem_base, (void *)buf, sizeof(buf));
+ flush_dcache_range(vidmem_base, sizeof(buf));
+
+ /* Issue request to "move" the protected memory region */
+ args.arg1 = vidmem_base;
+ args.arg2 = (u_register_t)size_in_bytes;
+ ret = tftf_smc(&args);
+ if (ret.ret0 != 0UL) {
+ tftf_testcase_printf("%s failed. Expected 0, received %ld\n",
+ __func__, (long int)ret.ret0);
+ result = TEST_RESULT_FAIL;
+ goto exit;
+ }
+
+ /* Verify that memory in the open has been cleared */
+ mem = vidmem_base + offset;
+ for (unsigned int i = 0U; i < (size_in_bytes / 8); i++, mem += 8) {
+ if (*(uint64_t *)(void *)mem != 0U) {
+ tftf_testcase_printf("%s failed. Memory is non-zero (%llx:%llx)\n",
+ __func__, mem, *(uint64_t *)(void *)mem);
+ result = TEST_RESULT_FAIL;
+ goto exit;
+ }
+ }
+
+exit:
+ /* unmap dummy memory region */
+ err = mmap_remove_dynamic_region(vidmem_base, size_in_bytes << 2);
+ if (err != 0) {
+ tftf_testcase_printf("%s: could not unmap memory (%d)\n",
+ __func__, err);
+ result = TEST_RESULT_FAIL;
+ }
+
+ return result;
+}
+
+/*
+ * @Test_Aim@ Test to issue common SiP SMC function IDs.
+ *
+ * This test runs on the lead CPU and issues TEGRA_SIP_NEW_VIDEOMEM_REGION
+ * and tests positive and negative scenarios.
+ */
+test_result_t test_sip_videomem_incorrect_inputs(void)
+{
+ smc_args args = { TEGRA_SIP_NEW_VIDEOMEM_REGION };
+ smc_ret_values ret;
+
+ /* Issue the SMC with no input parameters and expect error */
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* Issue the SMC with incorrect parameters and expect error */
+ args.arg1 = 0x10000000ULL;
+ args.arg2 = 4ULL << 20;
+
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* Issue the SMC with incorrect parameters and expect error */
+ args.arg1 = 0x40000000ULL;
+ args.arg2 = 4ULL << 20;
+
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* Issue the SMC with incorrect parameters and expect error */
+ args.arg1 = DRAM_END - (4U << 20);
+ args.arg2 = 0x100ULL;
+
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* Issue the SMC with incorrect parameters and expect error */
+ args.arg1 = DRAM_END - (4U << 20);
+ args.arg2 = 0ULL;
+
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ /* Issue the SMC with incorrect parameters and expect error */
+ args.arg1 = 0ULL;
+ args.arg2 = 4ULL << 20;
+
+ ret = tftf_smc(&args);
+ if (ret.ret0 == 0UL) {
+ tftf_testcase_printf("%s failed. Expected -1, received %ld\n",
+ __func__, (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ return TEST_RESULT_SUCCESS;
+}
+
+/**
+ * @Test_Aim@ Test to read the SMMU_PER register contents and print the
+ * values.
+ */
+test_result_t test_get_smmu_per(void)
+{
+ smc_args tegra_sip_smc = { TEGRA_SIP_GET_SMMU_PER, 0ULL, 0ULL, 0ULL, 0ULL };
+ smc_ret_values ret;
+
+ tftf_testcase_printf("Tegra SIP GET SMMU PER test\n");
+
+ ret = tftf_smc(&tegra_sip_smc);
+
+ if (ret.ret0 != SMC_OK) {
+ tftf_testcase_printf("GET_SMMU_PER test Fail, got %ld\n", (long int)ret.ret0);
+ return TEST_RESULT_FAIL;
+ }
+
+ tftf_testcase_printf("GET_SMMU_PER per[0] = %lu\n", ret.ret1);
+ tftf_testcase_printf("GET_SMMU_PER per[1] = %lu\n", ret.ret2);
+ tftf_testcase_printf("GET_SMMU_PER per[2] = %lu\n", ret.ret3);
+
+ return TEST_RESULT_SUCCESS;
+}
diff --git a/tftf/tests/tests-tegra194.mk b/tftf/tests/tests-tegra194.mk
index 890c8407..a8674125 100644
--- a/tftf/tests/tests-tegra194.mk
+++ b/tftf/tests/tests-tegra194.mk
@@ -4,6 +4,10 @@
# SPDX-License-Identifier: BSD-3-Clause
#
+TESTS_SOURCES += $(addprefix tftf/tests/plat/nvidia/common/, \
+ test_sip.c \
+)
+
TESTS_SOURCES += $(addprefix tftf/tests/plat/nvidia/tegra194/, \
test_ras_corrected.c \
test_ras_uncorrectable.c \
diff --git a/tftf/tests/tests-tegra194.xml b/tftf/tests/tests-tegra194.xml
index 49f6f9e5..173d3642 100644
--- a/tftf/tests/tests-tegra194.xml
+++ b/tftf/tests/tests-tegra194.xml
@@ -7,7 +7,12 @@
-->
<testsuites>
- <testsuite name="Tegra194 platform tests" description="Tests for Tegra194 platforms">
+ <testsuite name="Tegra SiP tests" description="SiP tests for Tegra platforms">
+ <testcase name="Video Memory Configuration test" function="test_sip_videomem_incorrect_inputs" />
+ <testcase name="Video Memory Resize test" function="test_sip_videomem_resize" />
+ <testcase name="Read SMMU_PER register contents test" function="test_get_smmu_per" />
+ </testsuite>
+ <testsuite name="Tegra194 platform tests" description="Tests for Tegra194 platforms">
<testcase name="RAS corrected error test" function="test_ras_corrected" />
<testcase name="RAS uncorrectable error test" function="test_ras_uncorrectable" />
</testsuite>