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authorMadhukar Pappireddy <madhukar.pappireddy@arm.com>2020-12-17 15:37:44 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-12-17 15:37:44 +0000
commitac6b5cfdb2d13adb4dde511abf12cac42bf0c3a0 (patch)
treef6ff4b6bb7ca09343d36e68ebd97a77ca72f984b /tftf
parentd58ff40ddba20787f0d3bbd47c77f136c74e540b (diff)
parente3c33000dcdba44e90bdd657588d7e260c06e14a (diff)
downloadtf-a-tests-ac6b5cfdb2d13adb4dde511abf12cac42bf0c3a0.tar.gz
Merge "TFTF: Use MTE instructions in 'test_mte_instructions' test"
Diffstat (limited to 'tftf')
-rw-r--r--tftf/tests/extensions/mte/test_mte.c23
1 files changed, 16 insertions, 7 deletions
diff --git a/tftf/tests/extensions/mte/test_mte.c b/tftf/tests/extensions/mte/test_mte.c
index 7dbb9ef7..a2e8d995 100644
--- a/tftf/tests/extensions/mte/test_mte.c
+++ b/tftf/tests/extensions/mte/test_mte.c
@@ -15,13 +15,22 @@ test_result_t test_mte_instructions(void)
#ifdef __aarch64__
SKIP_TEST_IF_MTE_SUPPORT_LESS_THAN(MTE_IMPLEMENTED_EL0);
- /* irg */
- __asm__ volatile (".inst 0xD29BD5A9");
- __asm__ volatile (".inst 0x9ADF1129");
- /* addg */
- __asm__ volatile (".inst 0x91800129");
- /* subg */
- __asm__ volatile (".inst 0xD1800129");
+ /*
+ * This code must be compiled with '-march=armv8.5-memtag' option
+ * by setting 'ARM_ARCH_FEATURE=memtag' and 'ARM_ARCH_MINOR=5'
+ * build flags in tftf_config/fvp-cpu-extensions when this CI
+ * configuration is built separately.
+ * Otherwise this compiler's option must be specified explicitly.
+ *
+ * Execute Memory Tagging Extension instructions.
+ */
+ __asm__ volatile (
+ ".arch armv8.5-a+memtag\n"
+ "mov x0, #0xDEAD\n"
+ "irg x0, x0\n"
+ "addg x0, x0, #0x0, #0x0\n"
+ "subg x0, x0, #0x0, #0x0"
+ );
return TEST_RESULT_SUCCESS;
#endif /* __aarch64__ */