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author | Varun Wadekar <vwadekar@nvidia.com> | 2020-07-10 15:45:39 -0700 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-10-28 11:31:23 -0700 |
commit | 8900d8ca6a36f4f675ec02bb98c28c940e40c631 (patch) | |
tree | 8dcb650743ff6153f400685e3a5dbb432c50a035 /tftf | |
parent | dbf8a2f79fcb10857cca95cf76c5102798c03286 (diff) | |
download | tf-a-tests-8900d8ca6a36f4f675ec02bb98c28c940e40c631.tar.gz |
aarch64: enable SError aborts
This patch enables SError aborts for all CPUs, during their power
on sequence.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I3be0e593c709d65f03275b641b506c8669f2b475
Diffstat (limited to 'tftf')
-rw-r--r-- | tftf/framework/aarch64/arch.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tftf/framework/aarch64/arch.c b/tftf/framework/aarch64/arch.c index c3f57b8c9..56369ae80 100644 --- a/tftf/framework/aarch64/arch.c +++ b/tftf/framework/aarch64/arch.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2018-2019, Arm Limited. All rights reserved. + * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,6 +11,9 @@ void tftf_arch_setup(void) { /* Do not try to configure EL2 if TFTF is running at NS-EL1 */ if (IS_IN_EL2()) { + /* Enable asynchronous SError aborts to EL2 */ + enable_serror(); + /* * Route physical interrupts to EL2 regardless of the value of * the IMO/FMO bits. Without this, interrupts would not be taken |