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authorSandrine Bailleux <sandrine.bailleux@arm.com>2019-10-08 12:10:45 +0200
committerSandrine Bailleux <sandrine.bailleux@arm.com>2019-10-08 12:23:38 +0200
commit277fb7628c270c8a891c24dea80350f9c935d4c6 (patch)
tree05ffa6439c4713d68a8df2d4671139c531a7c751 /tftf
parent1ca3102141319bd514c296ddc256f92e321780a2 (diff)
downloadtf-a-tests-277fb7628c270c8a891c24dea80350f9c935d4c6.tar.gz
Add tests for MTE support
TF-A now has support for the new Memory Tagging Extension in ARMv8.5, see commit 91624b7fed52 ("Merge changes from topic "jc/mte_enable" into integration"). This patch creates and enables tests to ensure that the extension is being properly enabled and that no undesired leakages occur. Change-Id: I7708fb23a12e2f35a97533f296aaa53db776ddd2 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com> Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Diffstat (limited to 'tftf')
-rw-r--r--tftf/tests/extensions/mte/test_mte.c57
-rw-r--r--tftf/tests/tests-cpu-extensions.mk1
-rw-r--r--tftf/tests/tests-cpu-extensions.xml2
3 files changed, 60 insertions, 0 deletions
diff --git a/tftf/tests/extensions/mte/test_mte.c b/tftf/tests/extensions/mte/test_mte.c
new file mode 100644
index 00000000..13da667d
--- /dev/null
+++ b/tftf/tests/extensions/mte/test_mte.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <tftf.h>
+#include <tftf_lib.h>
+#include <tsp.h>
+#include <test_helpers.h>
+
+test_result_t test_mte_instructions(void)
+{
+ SKIP_TEST_IF_AARCH32();
+#ifdef AARCH64
+ SKIP_TEST_IF_MTE_SUPPORT_LESS_THAN(MTE_IMPLEMENTED_EL0);
+
+ /* irg */
+ __asm__ volatile (".inst 0xD29BD5A9");
+ __asm__ volatile (".inst 0x9ADF1129");
+ /* addg */
+ __asm__ volatile (".inst 0x91800129");
+ /* subg */
+ __asm__ volatile (".inst 0xD1800129");
+
+ return TEST_RESULT_SUCCESS;
+#endif /* AARCH64 */
+}
+
+test_result_t test_mte_leakage(void)
+{
+ SKIP_TEST_IF_AARCH32();
+#ifdef AARCH64
+ smc_args tsp_svc_params;
+ int gcr_el1;
+
+ SKIP_TEST_IF_MTE_SUPPORT_LESS_THAN(MTE_IMPLEMENTED_ELX);
+ SKIP_TEST_IF_TSP_NOT_PRESENT();
+
+ /* We only test gcr_el1 as writes to other MTE registers are ignored */
+ write_gcr_el1(0xdd);
+
+ /* Standard SMC to ADD two numbers */
+ tsp_svc_params.fid = TSP_STD_FID(TSP_ADD);
+ tsp_svc_params.arg1 = 4;
+ tsp_svc_params.arg2 = 6;
+ tftf_smc(&tsp_svc_params);
+
+ gcr_el1 = read_gcr_el1();
+ if (gcr_el1 != 0xdd) {
+ printf("gcr_el1 has changed to %d\n", gcr_el1);
+ return TEST_RESULT_FAIL;
+ }
+
+ return TEST_RESULT_SUCCESS;
+#endif /* AARCH64 */
+}
diff --git a/tftf/tests/tests-cpu-extensions.mk b/tftf/tests/tests-cpu-extensions.mk
index cb4c1f96..9102b351 100644
--- a/tftf/tests/tests-cpu-extensions.mk
+++ b/tftf/tests/tests-cpu-extensions.mk
@@ -6,6 +6,7 @@
TESTS_SOURCES += $(addprefix tftf/tests/, \
extensions/amu/test_amu.c \
+ extensions/mte/test_mte.c \
extensions/sve/sve_operations.S \
extensions/sve/test_sve.c \
runtime_services/arm_arch_svc/smccc_arch_workaround_1.c \
diff --git a/tftf/tests/tests-cpu-extensions.xml b/tftf/tests/tests-cpu-extensions.xml
index e6414378..158cb04f 100644
--- a/tftf/tests/tests-cpu-extensions.xml
+++ b/tftf/tests/tests-cpu-extensions.xml
@@ -16,6 +16,8 @@
<testcase name="Use Pointer Authentication Instructions" function="test_pauth_instructions" />
<testcase name="Check for Pointer Authentication key leakage from EL3" function="test_pauth_leakage" />
<testcase name="Check for Pointer Authentication key leakage from TSP" function="test_pauth_leakage_tsp" />
+ <testcase name="Use MTE Instructions" function="test_mte_instructions" />
+ <testcase name="Check for MTE register leakage" function="test_mte_leakage" />
</testsuite>
<testsuite name="ARM_ARCH_SVC" description="Arm Architecture Service tests">