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authorVarun Wadekar <vwadekar@nvidia.com>2020-05-22 10:52:23 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2020-10-23 18:49:03 -0700
commit5904da4a665586c340ed4aed2a623ed6b8a6da3f (patch)
treeeca0d42f96a3baad9222338c65bd90c9f9259f3d /tftf/tests
parentf5e43807acae22ff47b8ec3b198620b18f6ee512 (diff)
downloadtf-a-tests-5904da4a665586c340ed4aed2a623ed6b8a6da3f.tar.gz
timers: remove dependency on SYS_CNT_BASE1
The Arm ARM Section D11.1.1 titled "The full set of Generic Timer components" says that Memory-mapped timers are optional. The timer framework and tests use the SYS_CNT_BASE1 macro to read the memory mapped timers. But they can also read the CNTPCT_EL0 system register to get the same value to accommodate all Arm platforms. This patch replaces the usage of SYS_CNT_BASE1 from the timer code with calls to syscounter_read(). Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I4d9ee5587351ee737800539f4d48606e7de80538
Diffstat (limited to 'tftf/tests')
-rw-r--r--tftf/tests/framework_validation_tests/test_timer_framework.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tftf/tests/framework_validation_tests/test_timer_framework.c b/tftf/tests/framework_validation_tests/test_timer_framework.c
index 0bd2985f7..47647e780 100644
--- a/tftf/tests/framework_validation_tests/test_timer_framework.c
+++ b/tftf/tests/framework_validation_tests/test_timer_framework.c
@@ -423,7 +423,7 @@ static test_result_t do_stress_test(void)
tftf_send_event(&cpu_ready[core_pos]);
- end_time = mmio_read_64(SYS_CNT_BASE1 + CNTPCT_LO) + read_cntfrq_el0() * 10;
+ end_time = read_cntpct_el0() + read_cntfrq_el0() * 10;
/* Construct the state-id for power down */
ret = tftf_psci_make_composite_state_id(MPIDR_AFFLVL0,
@@ -441,7 +441,7 @@ static test_result_t do_stress_test(void)
}
do {
- current_time = mmio_read_64(SYS_CNT_BASE1 + CNTPCT_LO);
+ current_time = read_cntpct_el0();
if (current_time > end_time)
break;