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authorAmbroise Vincent <ambroise.vincent@arm.com>2019-03-07 10:17:15 +0000
committerAmbroise Vincent <ambroise.vincent@arm.com>2019-04-01 11:08:40 +0100
commitfae77720145bf50b0965b90d0055015a21923aef (patch)
treea11e91b812f0c1bd4a62fd3aa644b82947877907 /tftf/framework
parent88e96a1d790ca47c500a254dea32426e41e4e369 (diff)
downloadtf-a-tests-fae77720145bf50b0965b90d0055015a21923aef.tar.gz
Introduce test for SVE support
When SVE extension is enabled, test that it correctly performs simple operations. Generating SVE instructions requires O3 compilation optimization. Since the build structure does not allow compilation flag modification for specific files, the function testing SVE support has been pre-compiled and added as an assembly file. Change-Id: Id9ba7d9e1de9bcbae3065cad2dd3e1dbe87ef03a Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'tftf/framework')
-rw-r--r--tftf/framework/aarch64/arch.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/tftf/framework/aarch64/arch.c b/tftf/framework/aarch64/arch.c
index 0cdfd65c..c3f57b8c 100644
--- a/tftf/framework/aarch64/arch.c
+++ b/tftf/framework/aarch64/arch.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -17,6 +17,13 @@ void tftf_arch_setup(void)
* interrupt masks.
*/
write_hcr_el2(HCR_TGE_BIT);
+
+ /*
+ * Disable trap of SVE instructions to EL2.
+ * The fields of the CPTR_EL2 register reset to an
+ * architecturally UNKNOWN value.
+ */
+ write_cptr_el2(CPTR_EL2_RES1);
isb();
}
}