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authorAmbroise Vincent <ambroise.vincent@arm.com>2019-07-03 16:44:49 +0100
committerAmbroise Vincent <ambroise.vincent@arm.com>2019-08-01 11:34:18 +0100
commitee3e7cd720887077ad27f48f4c8e681926c16587 (patch)
treeb2be6933f915effc206f73faf1ce5a73118751c7 /plat
parent6927d85a0429bd247cb76b7cb4201e330fc745a1 (diff)
downloadtf-a-tests-ee3e7cd720887077ad27f48f4c8e681926c16587.tar.gz
ld: Separate code and RO data sections
This prevents the execution of the read-only data. This is done in a similar way in TF-A when the build flag SEPARATE_CODE_AND_RODATA is enabled. The build flag is probably not needed in TF-A Tests. Change-Id: I2bdc0237c00377beb2febeb47207770c85036192 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Diffstat (limited to 'plat')
-rw-r--r--plat/arm/fvp/include/platform_def.h4
-rw-r--r--plat/arm/juno/include/platform_def.h4
-rw-r--r--plat/common/plat_common.c50
3 files changed, 35 insertions, 23 deletions
diff --git a/plat/arm/fvp/include/platform_def.h b/plat/arm/fvp/include/platform_def.h
index 31b012a4e..4f64079f1 100644
--- a/plat/arm/fvp/include/platform_def.h
+++ b/plat/arm/fvp/include/platform_def.h
@@ -70,8 +70,8 @@
* NS_BL1U RW data is relocated from NS-ROM to NS-RAM at runtime so we
* need 2 sets of addresses.
******************************************************************************/
-#define NS_BL1U_RO_BASE (0x08000000 + 0x03EB8000)
-#define NS_BL1U_RO_LIMIT (NS_BL1U_RO_BASE + 0xC000)
+#define NS_BL1U_BASE (0x08000000 + 0x03EB8000)
+#define NS_BL1U_RO_LIMIT (NS_BL1U_BASE + 0xC000)
/*******************************************************************************
* Put NS_BL1U RW at the top of the Non-Trusted SRAM. NS_BL1U_RW_BASE is
diff --git a/plat/arm/juno/include/platform_def.h b/plat/arm/juno/include/platform_def.h
index 682866c79..4be864595 100644
--- a/plat/arm/juno/include/platform_def.h
+++ b/plat/arm/juno/include/platform_def.h
@@ -81,8 +81,8 @@
* NS_BL1U RW data is relocated from NS-ROM to NS-RAM at runtime so we
* need 2 sets of addresses.
******************************************************************************/
-#define NS_BL1U_RO_BASE (0x08000000 + 0x03EB8000)
-#define NS_BL1U_RO_LIMIT (NS_BL1U_RO_BASE + 0xC000)
+#define NS_BL1U_BASE (0x08000000 + 0x03EB8000)
+#define NS_BL1U_RO_LIMIT (NS_BL1U_BASE + 0xC000)
/*******************************************************************************
* Put NS_BL1U RW at the top of the Non-Trusted SRAM. NS_BL1U_RW_BASE is
diff --git a/plat/common/plat_common.c b/plat/common/plat_common.c
index c5f4592c7..4cfbebbf3 100644
--- a/plat/common/plat_common.c
+++ b/plat/common/plat_common.c
@@ -27,32 +27,40 @@
#if IMAGE_TFTF
-#define IMAGE_RO_BASE TFTF_BASE
-IMPORT_SYM(uintptr_t, __RO_END__, IMAGE_RO_END);
+#define IMAGE_TEXT_BASE TFTF_BASE
+IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
-#define IMAGE_RW_BASE IMAGE_RO_END
-IMPORT_SYM(uintptr_t, __TFTF_END__, IMAGE_RW_END);
+#define IMAGE_RODATA_BASE IMAGE_TEXT_END
+IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
-IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, COHERENT_RAM_START);
-IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, COHERENT_RAM_END);
+#define IMAGE_RW_BASE IMAGE_RODATA_END
+IMPORT_SYM(uintptr_t, __TFTF_END__, IMAGE_RW_END);
+
+IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, COHERENT_RAM_START);
+IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, COHERENT_RAM_END);
#elif IMAGE_NS_BL1U
-IMPORT_SYM(uintptr_t, __RO_END__, IMAGE_RO_END_UNALIGNED);
-#define IMAGE_RO_BASE NS_BL1U_RO_BASE
-#define IMAGE_RO_END round_up(IMAGE_RO_END_UNALIGNED, PAGE_SIZE)
+#define IMAGE_TEXT_BASE NS_BL1U_BASE
+IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
+
+#define IMAGE_RODATA_BASE IMAGE_TEXT_END
+IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
-#define IMAGE_RW_BASE NS_BL1U_RW_BASE
-IMPORT_SYM(uintptr_t, __NS_BL1U_RAM_END__, IMAGE_RW_END);
+#define IMAGE_RW_BASE NS_BL1U_RW_BASE
+IMPORT_SYM(uintptr_t, __NS_BL1U_RAM_END__, IMAGE_RW_END);
#elif IMAGE_NS_BL2U
-#define IMAGE_RO_BASE NS_BL2U_BASE
-IMPORT_SYM(uintptr_t, __RO_END__, IMAGE_RO_END);
+#define IMAGE_TEXT_BASE NS_BL2U_BASE
+IMPORT_SYM(uintptr_t, __TEXT_END__, IMAGE_TEXT_END);
-#define IMAGE_RW_BASE IMAGE_RO_END
-IMPORT_SYM(uintptr_t, __NS_BL2U_END__, IMAGE_RW_END_UNALIGNED);
-#define IMAGE_RW_END round_up(IMAGE_RW_END_UNALIGNED, PAGE_SIZE)
+#define IMAGE_RODATA_BASE IMAGE_TEXT_END
+IMPORT_SYM(uintptr_t, __RODATA_END__, IMAGE_RODATA_END);
+
+#define IMAGE_RW_BASE IMAGE_RODATA_END
+IMPORT_SYM(uintptr_t, __NS_BL2U_END__, IMAGE_RW_END_UNALIGNED);
+#define IMAGE_RW_END round_up(IMAGE_RW_END_UNALIGNED, PAGE_SIZE)
#endif
@@ -78,9 +86,13 @@ void tftf_platform_watchdog_reset(void)
void tftf_plat_configure_mmu(void)
{
- /* RO data + Code */
- mmap_add_region(IMAGE_RO_BASE, IMAGE_RO_BASE,
- IMAGE_RO_END - IMAGE_RO_BASE, MT_CODE);
+ /* Code */
+ mmap_add_region(IMAGE_TEXT_BASE, IMAGE_TEXT_BASE,
+ IMAGE_TEXT_END - IMAGE_TEXT_BASE, MT_CODE);
+
+ /* RO data */
+ mmap_add_region(IMAGE_RODATA_BASE, IMAGE_RODATA_BASE,
+ IMAGE_RODATA_END - IMAGE_RODATA_BASE, MT_RO_DATA);
/* Data + BSS */
mmap_add_region(IMAGE_RW_BASE, IMAGE_RW_BASE,