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author | Chandni Cherukuri <chandni.cherukuri@arm.com> | 2019-01-07 14:19:40 +0530 |
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committer | Chandni Cherukuri <chandni.cherukuri@arm.com> | 2019-02-27 14:50:16 +0530 |
commit | 3ddff339574682c1f6727e2fc0d130ad66d717d2 (patch) | |
tree | 0e86bb94df8d6b904991df19523509690a6bbe1d /el3_payload | |
parent | 33f1774a7d1c74bbe29d9c18fb06d2efdea758db (diff) | |
download | tf-a-tests-3ddff339574682c1f6727e2fc0d130ad66d717d2.tar.gz |
el3_payload: Add initial platform support for RD-N1-Edge
RD-N1-Edge platform consists of two clusters of four CPUs
each. CPU0 of the first cluster is the primary CPU. SoC UART0 is
used for the console log.
Change-Id: I724c772f95d590154536e7bc1544976e55b983cf
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Diffstat (limited to 'el3_payload')
-rw-r--r-- | el3_payload/plat/rdn1edge/platform.S | 49 | ||||
-rw-r--r-- | el3_payload/plat/rdn1edge/platform.h | 19 | ||||
-rw-r--r-- | el3_payload/plat/rdn1edge/platform.mk | 8 |
3 files changed, 76 insertions, 0 deletions
diff --git a/el3_payload/plat/rdn1edge/platform.S b/el3_payload/plat/rdn1edge/platform.S new file mode 100644 index 000000000..a269674e5 --- /dev/null +++ b/el3_payload/plat/rdn1edge/platform.S @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2019, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "arch.h" +#include "asm_macros.S" +#include "platform.h" + + .globl platform_get_core_pos + +/*---------------------------------------------------------------------- + * unsigned int platform_get_core_pos(unsigned long mpid) + * + * Function to calculate the core position. + * + * (ClusterId * MAX_CPUS_PER_CLUSTER * MAX_PE_PER_CPU) + + * (CPUId * MAX_PE_PER_CPU) + + * ThreadId + * + * which can be simplified as: + * + * ((ClusterId * MAX_CPUS_PER_CLUSTER + CPUId) * MAX_PE_PER_CPU) + * + ThreadId + * + * --------------------------------------------------------------------- + */ +func platform_get_core_pos + /* + * Check for MT bit in MPIDR. If not set, shift MPIDR to left to make it + * look as if in a multi-threaded implementation. + */ + tst x0, #MPIDR_MT_MASK + lsl x3, x0, #MPIDR_AFFINITY_BITS + csel x3, x3, x0, eq + + /* Extract individual affinity fields from MPIDR */ + ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS + ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS + ubfx x2, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS + + /* Compute linear position */ + mov x3, #MAX_CPUS_PER_CLUSTER + madd x1, x2, x3, x1 + mov x3, #MAX_PE_PER_CPU + madd x0, x1, x3, x0 + ret +endfunc platform_get_core_pos diff --git a/el3_payload/plat/rdn1edge/platform.h b/el3_payload/plat/rdn1edge/platform.h new file mode 100644 index 000000000..9ad37f549 --- /dev/null +++ b/el3_payload/plat/rdn1edge/platform.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2019, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PLATFORM_H +#define PLATFORM_H + +#define PRIMARY_CPU_MPID 0x0 + +#define CPUS_COUNT 8 + +#define UART_BASE 0x7ff80000 + +#define MAX_CPUS_PER_CLUSTER 4 +#define MAX_PE_PER_CPU 1 + +#endif /* PLATFORM_H */ diff --git a/el3_payload/plat/rdn1edge/platform.mk b/el3_payload/plat/rdn1edge/platform.mk new file mode 100644 index 000000000..5896518da --- /dev/null +++ b/el3_payload/plat/rdn1edge/platform.mk @@ -0,0 +1,8 @@ +# +# Copyright (c) 2019, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +DRAM_BASE := 0x80000000 +DRAM_SIZE := 0x80000000 |