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authorDeepika Bhavnani <deepika.bhavnani@arm.com>2020-02-06 16:29:45 -0600
committerDeepika Bhavnani <deepika.bhavnani@arm.com>2020-02-11 09:22:12 -0600
commitc249d5e5cfbf2aa0f584001543c1d39953e1d6aa (patch)
treebae825efb76949c451188bb0e96de2ea1b120514 /drivers
parent1b5952a79ca1a6feb7b23372420285e886497852 (diff)
downloadtf-a-tests-c249d5e5cfbf2aa0f584001543c1d39953e1d6aa.tar.gz
Switch AARCH32/AARCH64 to __aarch64__
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) NOTE: This change is based on below TFA commit https://github.com/ARM-software/arm-trusted-firmware/commit/402b3cf8766fe2cb4ae462f7ee7761d08a1ba56c Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: If2c3dbaeb01d4a9d8cfd95d906e5eaf4ae94417f
Diffstat (limited to 'drivers')
-rw-r--r--drivers/arm/gic/gic_common.c4
-rw-r--r--drivers/arm/gic/gic_v3.c12
2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/arm/gic/gic_common.c b/drivers/arm/gic/gic_common.c
index e16b2137..7e76a20e 100644
--- a/drivers/arm/gic/gic_common.c
+++ b/drivers/arm/gic/gic_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -190,7 +190,7 @@ void gicd_set_ipriorityr(uintptr_t base, unsigned int interrupt_id,
unsigned int is_gicv3_mode(void)
{
/* Check if GICv3 system register available */
-#ifndef AARCH32
+#ifdef __aarch64__
if (!(read_id_aa64pfr0_el1() & (ID_AA64PFR0_GIC_MASK << ID_AA64PFR0_GIC_SHIFT)))
return 0;
#else
diff --git a/drivers/arm/gic/gic_v3.c b/drivers/arm/gic/gic_v3.c
index ea661594..56049e31 100644
--- a/drivers/arm/gic/gic_v3.c
+++ b/drivers/arm/gic/gic_v3.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -18,7 +18,7 @@
static uintptr_t gicr_base_addr;
static uintptr_t gicd_base_addr;
-#ifndef AARCH32
+#ifdef __aarch64__
#define MPIDR_AFFLVL3_MASK ((unsigned long long)MPIDR_AFFLVL_MASK << MPIDR_AFF3_SHIFT)
#define gic_typer_affinity_from_mpidr(mpidr) \
(((mpidr) & (~MPIDR_AFFLVL3_MASK)) | (((mpidr) & MPIDR_AFFLVL3_MASK) >> 8))
@@ -312,7 +312,7 @@ void gicv3_send_sgi(unsigned int sgi_id, unsigned int core_pos)
aff0 = MPIDR_AFF_ID(mpidr_list[core_pos], 0);
aff1 = MPIDR_AFF_ID(mpidr_list[core_pos], 1);
aff2 = MPIDR_AFF_ID(mpidr_list[core_pos], 2);
-#ifndef AARCH32
+#ifdef __aarch64__
unsigned long long aff3;
aff3 = MPIDR_AFF_ID(mpidr_list[core_pos], 3);
#endif
@@ -323,7 +323,7 @@ void gicv3_send_sgi(unsigned int sgi_id, unsigned int core_pos)
/* Construct the SGI target affinity */
sgir =
-#ifndef AARCH32
+#ifdef __aarch64__
((aff3 & SGI1R_AFF_MASK) << SGI1R_AFF3_SHIFT) |
#endif
((aff2 & SGI1R_AFF_MASK) << SGI1R_AFF2_SHIFT) |
@@ -333,7 +333,7 @@ void gicv3_send_sgi(unsigned int sgi_id, unsigned int core_pos)
/* Combine SGI target affinity with the SGI ID */
sgir |= ((sgi_id & SGI1R_INTID_MASK) << SGI1R_INTID_SHIFT);
-#ifndef AARCH32
+#ifdef __aarch64__
write_icc_sgi1r(sgir);
#else
write64_icc_sgi1r(sgir);
@@ -477,7 +477,7 @@ void gicv3_setup_distif(void)
assert(gicd_base_addr);
/* Check for system register support */
-#ifndef AARCH32
+#ifdef __aarch64__
assert(read_id_aa64pfr0_el1() &
(ID_AA64PFR0_GIC_MASK << ID_AA64PFR0_GIC_SHIFT));
#else