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author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-09-25 06:25:59 +0000 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-25 06:25:59 +0000 |
commit | cdba6c95f558304f77b062d58c6c398b3655ef93 (patch) | |
tree | 8e34cf61f431a255cf7f3004d9e3cce4c6e74530 | |
parent | 2676b99a81b4f886b7b79189cbe432705843977b (diff) | |
parent | 1b92611fddb4b3360ca1d6db3b91a2c3b7bf99bb (diff) | |
download | tf-a-tests-cdba6c95f558304f77b062d58c6c398b3655ef93.tar.gz |
Merge "Fix a false fail for SMC WORKAROUND2 test on Cortex-A76"
-rw-r--r-- | tftf/tests/runtime_services/arm_arch_svc/smccc_arch_workaround_2.c | 59 |
1 files changed, 45 insertions, 14 deletions
diff --git a/tftf/tests/runtime_services/arm_arch_svc/smccc_arch_workaround_2.c b/tftf/tests/runtime_services/arm_arch_svc/smccc_arch_workaround_2.c index a09087411..cf36e4f80 100644 --- a/tftf/tests/runtime_services/arm_arch_svc/smccc_arch_workaround_2.c +++ b/tftf/tests/runtime_services/arm_arch_svc/smccc_arch_workaround_2.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Arm Limited. All rights reserved. + * Copyright (c) 2019, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,7 +15,12 @@ #include <tftf_lib.h> #ifdef AARCH64 -#define CORTEX_A76_MIDR 0x410fd0b0 +#define NOT_REQUIRED_DONOT_INVOKE -2 +#define NOT_SUPPORTED -1 +#define IS_REQUIRED 0 +#define NOT_REQUIRED 1 + +#define CORTEX_A76_MIDR 0x410fd0b0 static int cortex_a76_test(void); @@ -37,7 +42,6 @@ static test_result_t test_smccc_entrypoint(void) smc_ret_values ret; int32_t expected_ver; unsigned int my_midr, midr_mask; - int wa_required; size_t i; /* Check if SMCCC version is at least v1.1 */ @@ -56,16 +60,43 @@ static test_result_t test_smccc_entrypoint(void) args.fid = SMCCC_ARCH_FEATURES; args.arg1 = SMCCC_ARCH_WORKAROUND_2; ret = tftf_smc(&args); - if ((int)ret.ret0 == -1) { - tftf_testcase_printf("SMCCC_ARCH_WORKAROUND_2 is not implemented\n"); + + switch ((int)ret.ret0) { + + case NOT_REQUIRED_DONOT_INVOKE: + /* + * This workaround is not required and must not be invoked on + * any PE in this system + */ + tftf_testcase_printf("SMCCC_ARCH_WORKAROUND_2 is not required\n"); return TEST_RESULT_SKIPPED; - } - /* If the call returns 0, it means the workaround is required */ - if ((int)ret.ret0 == 0) - wa_required = 1; - else - wa_required = 0; + case NOT_SUPPORTED: + /* + * This workaround is not supported and must not be invoked on + * any PE in this system + */ + tftf_testcase_printf("SMCCC_ARCH_WORKAROUND_2 is not supported\n"); + return TEST_RESULT_SKIPPED; + + case IS_REQUIRED: + /* This workaround is required. Proceed with the test */ + break; + + case NOT_REQUIRED: + /* + * This PE does not require dynamic firmware mitigation using + * SMCCC_ARCH_WORKAROUND_2 + */ + tftf_testcase_printf("SMCCC_ARCH_WORKAROUND_2 is not required\n"); + return TEST_RESULT_SKIPPED; + + default: + tftf_testcase_printf("Illegal value %d returned by " + "SMCCC_ARCH_WORKAROUND_2 function\n", (int)ret.ret0); + return TEST_RESULT_FAIL; + + } /* Check if the SMC return value matches our expectations */ my_midr = (unsigned int)read_midr_el1(); @@ -75,12 +106,12 @@ static test_result_t test_smccc_entrypoint(void) struct ent *entp = &entries[i]; if ((my_midr & midr_mask) == (entp->midr & midr_mask)) { - if (entp->wa_required() != wa_required) + if (entp->wa_required() != 1) return TEST_RESULT_FAIL; break; } } - if (i == ARRAY_SIZE(entries) && wa_required) { + if (i == ARRAY_SIZE(entries)) { tftf_testcase_printf("TFTF workaround table out of sync with TF\n"); return TEST_RESULT_FAIL; } @@ -128,4 +159,4 @@ test_result_t test_smccc_arch_workaround_2(void) INFO("%s skipped on AArch32\n", __func__); return TEST_RESULT_SKIPPED; } -#endif +#endif /* AARCH64 */ |