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authorSandrine Bailleux <sandrine.bailleux@arm.com>2019-05-28 07:49:13 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-05-28 07:49:13 +0000
commitc9ab1fd3b32cc3adce83b76a5a801ae492c175ff (patch)
tree7bc7490da8fab528fc151eb712adc02efa5a414d
parent16a32f7e388fc3246b1e1d06c815a0fa09cd7818 (diff)
parentcae91ca61cc36462c3e1b639c2725535a0c05df4 (diff)
downloadtf-a-tests-c9ab1fd3b32cc3adce83b76a5a801ae492c175ff.tar.gz
Merge changes from topic "jts/amu"
* changes: Fix AMU non-zero counters test Remove unexecuted code for AMU group 1 counters
-rw-r--r--tftf/tests/extensions/amu/test_amu.c77
-rw-r--r--tftf/tests/tests-cpu-extensions.xml2
2 files changed, 35 insertions, 44 deletions
diff --git a/tftf/tests/extensions/amu/test_amu.c b/tftf/tests/extensions/amu/test_amu.c
index 2e2ea6fba..8799aa5f0 100644
--- a/tftf/tests/extensions/amu/test_amu.c
+++ b/tftf/tests/extensions/amu/test_amu.c
@@ -91,12 +91,31 @@ static test_result_t suspend_and_resume_this_cpu(void)
}
/*
- * Check that group0/group1 counters are non-zero. As EL3
- * has enabled the counters before the first entry to NS world,
- * the counters should have increased by the time we reach this
- * test case.
+ * Helper function that checks whether the value of a group0 counter is valid
+ * or not. The first 3 counters (0,1,2) cannot have values of zero but the last
+ * counter that counts "memory stall cycles" can have a value of zero, under
+ * certain circumstances.
+ *
+ * Return values:
+ * 0 = valid counter value
+ * -1 = invalid counter value
+ */
+static int amu_group0_cnt_valid(unsigned int idx, uint64_t value)
+{
+ int answer = 0;
+
+ if ((idx <= 2) && (value == 0))
+ answer = -1;
+
+ return answer;
+}
+
+/*
+ * Check that group0 counters are valid. As EL3 has enabled the counters before
+ * the first entry to NS world, the counters should have increased by the time
+ * we reach this test case.
*/
-test_result_t test_amu_nonzero_ctr(void)
+test_result_t test_amu_valid_ctr(void)
{
int i;
@@ -104,26 +123,15 @@ test_result_t test_amu_nonzero_ctr(void)
return TEST_RESULT_SKIPPED;
/* If counters are not enabled, then skip the test */
- if (read_amcntenset0_el0() != AMU_GROUP0_COUNTERS_MASK ||
- read_amcntenset1_el0() != AMU_GROUP1_COUNTERS_MASK)
+ if (read_amcntenset0_el0() != AMU_GROUP0_COUNTERS_MASK)
return TEST_RESULT_SKIPPED;
for (i = 0; i < AMU_GROUP0_NR_COUNTERS; i++) {
- uint64_t v;
-
- v = amu_group0_cnt_read(i);
- if (v == 0) {
- tftf_testcase_printf("Group0 counter cannot be 0\n");
- return TEST_RESULT_FAIL;
- }
- }
-
- for (i = 0; i < AMU_GROUP1_NR_COUNTERS; i++) {
- uint64_t v;
+ uint64_t value;
- v = amu_group1_cnt_read(i);
- if (v == 0) {
- tftf_testcase_printf("Group1 counter cannot be 0\n");
+ value = amu_group0_cnt_read(i);
+ if (amu_group0_cnt_valid(i, value)) {
+ tftf_testcase_printf("Group0 counter %d has invalid value %lld\n", i, value);
return TEST_RESULT_FAIL;
}
}
@@ -138,24 +146,19 @@ test_result_t test_amu_nonzero_ctr(void)
test_result_t test_amu_suspend_resume(void)
{
uint64_t group0_ctrs[AMU_GROUP0_MAX_NR_COUNTERS];
- uint64_t group1_ctrs[AMU_GROUP1_MAX_NR_COUNTERS];
int i;
if (!amu_supported())
return TEST_RESULT_SKIPPED;
/* If counters are not enabled, then skip the test */
- if (read_amcntenset0_el0() != AMU_GROUP0_COUNTERS_MASK ||
- read_amcntenset1_el0() != AMU_GROUP1_COUNTERS_MASK)
+ if (read_amcntenset0_el0() != AMU_GROUP0_COUNTERS_MASK)
return TEST_RESULT_SKIPPED;
/* Save counters values before suspend */
for (i = 0; i < AMU_GROUP0_NR_COUNTERS; i++)
group0_ctrs[i] = amu_group0_cnt_read(i);
- for (i = 0; i < AMU_GROUP1_NR_COUNTERS; i++)
- group1_ctrs[i] = amu_group1_cnt_read(i);
-
/* Suspend/resume current core */
suspend_and_resume_this_cpu();
@@ -164,25 +167,13 @@ test_result_t test_amu_suspend_resume(void)
* If they are not, the AMU context save/restore in EL3 is buggy.
*/
for (i = 0; i < AMU_GROUP0_NR_COUNTERS; i++) {
- uint64_t v;
+ uint64_t value;
- v = amu_group0_cnt_read(i);
- if (v < group0_ctrs[i]) {
+ value = amu_group0_cnt_read(i);
+ if (value < group0_ctrs[i]) {
tftf_testcase_printf("Invalid counter value: before: %llx, after: %llx\n",
(unsigned long long)group0_ctrs[i],
- (unsigned long long)v);
- return TEST_RESULT_FAIL;
- }
- }
-
- for (i = 0; i < AMU_GROUP1_NR_COUNTERS; i++) {
- uint64_t v;
-
- v = amu_group1_cnt_read(i);
- if (v < group1_ctrs[i]) {
- tftf_testcase_printf("Invalid counter value: before: %llx, after: %llx\n",
- (unsigned long long)group1_ctrs[i],
- (unsigned long long)v);
+ (unsigned long long)value);
return TEST_RESULT_FAIL;
}
}
diff --git a/tftf/tests/tests-cpu-extensions.xml b/tftf/tests/tests-cpu-extensions.xml
index 4c3ad433f..e64143782 100644
--- a/tftf/tests/tests-cpu-extensions.xml
+++ b/tftf/tests/tests-cpu-extensions.xml
@@ -9,7 +9,7 @@
<testsuites>
<testsuite name="CPU extensions" description="Various CPU extensions tests">
- <testcase name="AMUv1 non-zero counters" function="test_amu_nonzero_ctr" />
+ <testcase name="AMUv1 valid counter values" function="test_amu_valid_ctr" />
<testcase name="AMUv1 suspend/resume" function="test_amu_suspend_resume" />
<testcase name="SVE support" function="test_sve_support" />
<testcase name="Access Pointer Authentication Registers" function="test_pauth_reg_access" />