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author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-11 13:38:42 +0000 |
---|---|---|
committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-11 13:38:42 +0000 |
commit | a17e77c53ba160e0394c331e6c37a4f3b271a78b (patch) | |
tree | 5bb1569d66e350804389a334c0da7478538e87f2 | |
parent | 69068db7e2d0226c3ba8135aec31c01cb149187e (diff) | |
download | tf-a-tests-a17e77c53ba160e0394c331e6c37a4f3b271a78b.tar.gz |
xlat v2: Dynamically detect need for CnP bit
ARMv8.2-TTCNP is mandatory from ARMv8.2 onwards, but it can be implemented
in CPUs that don't implement all mandatory 8.2 features (and so have to
claim to be a lower version).
This patch removes usage of the ARM_ARCH_AT_LEAST() macro and uses system
ID registers to detect whether it is needed to set the bit or not.
Change-Id: Ie818c1b91fc319f194d17e21da922798a2a76ec6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-rw-r--r-- | lib/xlat_tables_v2/aarch32/xlat_tables_arch.c | 14 | ||||
-rw-r--r-- | lib/xlat_tables_v2/aarch64/xlat_tables_arch.c | 14 |
2 files changed, 12 insertions, 16 deletions
diff --git a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c index 66938e5f1..c4e421661 100644 --- a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c @@ -1,10 +1,11 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <arch.h> +#include <arch_features.h> #include <arch_helpers.h> #include <assert.h> #include <cassert.h> @@ -216,13 +217,10 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags, /* Set TTBR0 bits as well */ ttbr0 = (uint64_t)(uintptr_t) base_table; -#if ARM_ARCH_AT_LEAST(8, 2) - /* - * Enable CnP bit so as to share page tables with all PEs. This - * is mandatory for ARMv8.2 implementations. - */ - ttbr0 |= TTBR_CNP_BIT; -#endif + if (is_armv8_2_ttcnp_present()) { + /* Enable CnP bit so as to share page tables with all PEs. */ + ttbr0 |= TTBR_CNP_BIT; + } /* Now populate MMU configuration */ params[MMU_CFG_MAIR] = mair; diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c index 269adc7ef..08dd920b9 100644 --- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c @@ -1,10 +1,11 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <arch.h> +#include <arch_features.h> #include <arch_helpers.h> #include <assert.h> #include <cassert.h> @@ -264,13 +265,10 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags, /* Set TTBR bits as well */ ttbr0 = (uint64_t) base_table; -#if ARM_ARCH_AT_LEAST(8, 2) - /* - * Enable CnP bit so as to share page tables with all PEs. This - * is mandatory for ARMv8.2 implementations. - */ - ttbr0 |= TTBR_CNP_BIT; -#endif + if (is_armv8_2_ttcnp_present()) { + /* Enable CnP bit so as to share page tables with all PEs. */ + ttbr0 |= TTBR_CNP_BIT; + } params[MMU_CFG_MAIR] = mair; params[MMU_CFG_TCR] = tcr; |