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authorSandrine Bailleux <sandrine.bailleux@arm.com>2019-03-05 08:28:10 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-03-05 08:28:10 +0000
commit426cbb2cc56b3a2b129ac7386b96bb325c577f1a (patch)
tree7ef584d0d5bade2d74aad33061521e26ec30534b
parentd6e806d35599bf003c575d7d113367b8de910448 (diff)
parent33f1774a7d1c74bbe29d9c18fb06d2efdea758db (diff)
downloadtf-a-tests-426cbb2cc56b3a2b129ac7386b96bb325c577f1a.tar.gz
Merge "plat/arm/rdinfra: Add initial platform support for RD-N1-Edge"
-rw-r--r--plat/arm/rdinfra/rdn1edge/include/platform_def.h16
-rw-r--r--plat/arm/rdinfra/rdn1edge/platform.mk13
-rw-r--r--plat/arm/rdinfra/rdn1edge/tests_to_skip.txt9
-rw-r--r--plat/arm/rdinfra/rdn1edge/topology.c58
4 files changed, 96 insertions, 0 deletions
diff --git a/plat/arm/rdinfra/rdn1edge/include/platform_def.h b/plat/arm/rdinfra/rdn1edge/include/platform_def.h
new file mode 100644
index 00000000..45816f5e
--- /dev/null
+++ b/plat/arm/rdinfra/rdn1edge/include/platform_def.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
+
+#include <sgi_base_platform_def.h>
+
+#define SGI_CLUSTER_COUNT 2
+#define SGI_MAX_CPUS_PER_CLUSTER 4
+#define SGI_MAX_PE_PER_CPU 1
+
+#endif /* PLATFORM_DEF_H */
diff --git a/plat/arm/rdinfra/rdn1edge/platform.mk b/plat/arm/rdinfra/rdn1edge/platform.mk
new file mode 100644
index 00000000..3e25a047
--- /dev/null
+++ b/plat/arm/rdinfra/rdn1edge/platform.mk
@@ -0,0 +1,13 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+include plat/arm/sgi/common/sgi_common.mk
+
+PLAT_INCLUDES += -Iplat/arm/rdinfra/rdn1edge/include/
+
+PLAT_SOURCES += plat/arm/rdinfra/rdn1edge/topology.c
+
+PLAT_TESTS_SKIP_LIST := plat/arm/rdinfra/rdn1edge/tests_to_skip.txt
diff --git a/plat/arm/rdinfra/rdn1edge/tests_to_skip.txt b/plat/arm/rdinfra/rdn1edge/tests_to_skip.txt
new file mode 100644
index 00000000..7fda40b7
--- /dev/null
+++ b/plat/arm/rdinfra/rdn1edge/tests_to_skip.txt
@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2019, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+# System suspend is not supported as there are no wakeup sources in RD-N1Edge FVP
+PSCI STAT/Stats test cases after system suspend
+PSCI System Suspend Validation
diff --git a/plat/arm/rdinfra/rdn1edge/topology.c b/plat/arm/rdinfra/rdn1edge/topology.c
new file mode 100644
index 00000000..5521de45
--- /dev/null
+++ b/plat/arm/rdinfra/rdn1edge/topology.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+#include <plat_topology.h>
+#include <tftf_lib.h>
+
+static const struct {
+ unsigned int cluster_id;
+ unsigned int cpu_id;
+} plat_cores[] = {
+ /* Cluster0: 4 cores*/
+ { 0, 0 },
+ { 0, 1 },
+ { 0, 2 },
+ { 0, 3 },
+ /* Cluster1: 4 cores */
+ { 1, 0 },
+ { 1, 1 },
+ { 1, 2 },
+ { 1, 3 },
+};
+
+/*
+ * The power domain tree descriptor. The cluster power domains are
+ * arranged so that when the PSCI generic code creates the power domain tree,
+ * the indices of the CPU power domain nodes it allocates match the linear
+ * indices returned by plat_core_pos_by_mpidr().
+ */
+const unsigned char plat_pd_tree_desc[] = {
+ /* Number of root nodes */
+ SGI_CLUSTER_COUNT,
+ /* Number of children for the 1st node */
+ SGI_MAX_CPUS_PER_CLUSTER,
+ /* Number of children for the 2nd node */
+ SGI_MAX_CPUS_PER_CLUSTER
+};
+
+const unsigned char *tftf_plat_get_pwr_domain_tree_desc(void)
+{
+ return plat_pd_tree_desc;
+}
+
+uint64_t tftf_plat_get_mpidr(unsigned int core_pos)
+{
+ unsigned int mpid;
+
+ assert(core_pos < PLATFORM_CORE_COUNT);
+
+ mpid = make_mpid(
+ plat_cores[core_pos].cluster_id,
+ plat_cores[core_pos].cpu_id);
+
+ return mpid;
+}