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authorAntonio de Angelis <antonio.deangelis@arm.com>2019-04-16 14:50:50 +0100
committerAntonio de Angelis <antonio.deangelis@arm.com>2019-04-18 14:58:05 +0100
commitf2dea5b126d2c3837e47dc9c939caff6fa754d51 (patch)
treecdb04e1d7f4815a2fc48393cf5b2bb1887cf1c29
parent0b9d008c2cee1a82245e1d92a3aadc87bb50c704 (diff)
downloadtrusted-firmware-m-f2dea5b126d2c3837e47dc9c939caff6fa754d51.tar.gz
Core: Add volatile to inline assembly blocks
This patch introduces the consistent usage of the keyword volatile to mark inline assembly blocks in order to avoid potential issues with aggressive optimisation modes that could remove them. Change-Id: I304286658b87ec41e738760479ef067895a63464 Signed-off-by: Antonio de Angelis <antonio.deangelis@arm.com>
-rw-r--r--interface/include/tfm_ns_svc.h2
-rw-r--r--interface/src/tfm_nspm_api.c2
-rw-r--r--platform/ext/target/mps2/an519/native_drivers/mpu_armv8m_drv.c10
-rw-r--r--platform/ext/target/mps2/an521/native_drivers/mpu_armv8m_drv.c8
-rw-r--r--platform/ext/target/musca_a/Native_Driver/mpu_armv8m_drv.c8
-rw-r--r--platform/ext/target/musca_b1/Native_Driver/mpu_armv8m_drv.c8
-rw-r--r--secure_fw/core/ipc/psa_client.c30
-rw-r--r--secure_fw/core/ipc/psa_service.c60
-rw-r--r--secure_fw/core/ipc/tfm_arch_v8m.c10
-rw-r--r--secure_fw/core/secure_utilities.h8
-rw-r--r--secure_fw/core/tfm_handler.c4
-rw-r--r--secure_fw/core/tfm_spm_services.c18
-rw-r--r--secure_fw/core/tfm_svc.h4
13 files changed, 86 insertions, 86 deletions
diff --git a/interface/include/tfm_ns_svc.h b/interface/include/tfm_ns_svc.h
index a45cd979e1..366a70a91a 100644
--- a/interface/include/tfm_ns_svc.h
+++ b/interface/include/tfm_ns_svc.h
@@ -24,7 +24,7 @@ extern "C" {
* \brief Macro to encode an svc instruction
*
*/
-#define SVC(code) __ASM("svc %0" : : "I" (code))
+#define SVC(code) __ASM volatile("svc %0" : : "I" (code))
/**
* \def LIST_SVC_NSPM
diff --git a/interface/src/tfm_nspm_api.c b/interface/src/tfm_nspm_api.c
index a835f2d42e..a540e8ca3d 100644
--- a/interface/src/tfm_nspm_api.c
+++ b/interface/src/tfm_nspm_api.c
@@ -64,7 +64,7 @@ __attribute__ ((naked))
static uint32_t tfm_nspm_svc_register_client(uint32_t client_id)
{
SVC(SVC_TFM_NSPM_REGISTER_CLIENT_ID);
- __ASM("BX LR");
+ __ASM volatile("BX LR");
}
uint32_t tfm_nspm_register_client_id(void)
diff --git a/platform/ext/target/mps2/an519/native_drivers/mpu_armv8m_drv.c b/platform/ext/target/mps2/an519/native_drivers/mpu_armv8m_drv.c
index e540be2b73..8a40cdcabf 100644
--- a/platform/ext/target/mps2/an519/native_drivers/mpu_armv8m_drv.c
+++ b/platform/ext/target/mps2/an519/native_drivers/mpu_armv8m_drv.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -30,8 +30,8 @@ enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev,
mpu->CTRL |= MPU_CTRL_ENABLE_Msk;
/* Enable MPU before next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return MPU_ARMV8M_OK;
}
@@ -90,8 +90,8 @@ enum mpu_armv8m_error_t mpu_armv8m_region_enable(
mpu->CTRL = ctrl_before;
/* Enable MPU before the next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return ret_val;
}
diff --git a/platform/ext/target/mps2/an521/native_drivers/mpu_armv8m_drv.c b/platform/ext/target/mps2/an521/native_drivers/mpu_armv8m_drv.c
index 4acd8cab54..b509cd976e 100644
--- a/platform/ext/target/mps2/an521/native_drivers/mpu_armv8m_drv.c
+++ b/platform/ext/target/mps2/an521/native_drivers/mpu_armv8m_drv.c
@@ -42,8 +42,8 @@ enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev,
mpu->CTRL |= MPU_CTRL_ENABLE_Msk;
/* Enable MPU before next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return MPU_ARMV8M_OK;
}
@@ -104,8 +104,8 @@ enum mpu_armv8m_error_t mpu_armv8m_region_enable(
mpu->CTRL = ctrl_before;
/* Enable MPU before the next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return ret_val;
}
diff --git a/platform/ext/target/musca_a/Native_Driver/mpu_armv8m_drv.c b/platform/ext/target/musca_a/Native_Driver/mpu_armv8m_drv.c
index e79b4d011d..703985de8d 100644
--- a/platform/ext/target/musca_a/Native_Driver/mpu_armv8m_drv.c
+++ b/platform/ext/target/musca_a/Native_Driver/mpu_armv8m_drv.c
@@ -30,8 +30,8 @@ enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev,
mpu->CTRL |= MPU_CTRL_ENABLE_Msk;
/* Enable MPU before next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return MPU_ARMV8M_OK;
}
@@ -90,8 +90,8 @@ enum mpu_armv8m_error_t mpu_armv8m_region_enable(
mpu->CTRL = ctrl_before;
/* Enable MPU before the next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return ret_val;
}
diff --git a/platform/ext/target/musca_b1/Native_Driver/mpu_armv8m_drv.c b/platform/ext/target/musca_b1/Native_Driver/mpu_armv8m_drv.c
index e79b4d011d..703985de8d 100644
--- a/platform/ext/target/musca_b1/Native_Driver/mpu_armv8m_drv.c
+++ b/platform/ext/target/musca_b1/Native_Driver/mpu_armv8m_drv.c
@@ -30,8 +30,8 @@ enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev,
mpu->CTRL |= MPU_CTRL_ENABLE_Msk;
/* Enable MPU before next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return MPU_ARMV8M_OK;
}
@@ -90,8 +90,8 @@ enum mpu_armv8m_error_t mpu_armv8m_region_enable(
mpu->CTRL = ctrl_before;
/* Enable MPU before the next instruction */
- __asm("DSB");
- __asm("ISB");
+ __DSB();
+ __ISB();
return ret_val;
}
diff --git a/secure_fw/core/ipc/psa_client.c b/secure_fw/core/ipc/psa_client.c
index f8fe605f02..8d71af7a8f 100644
--- a/secure_fw/core/ipc/psa_client.c
+++ b/secure_fw/core/ipc/psa_client.c
@@ -13,25 +13,25 @@
__attribute__((naked))
uint32_t psa_framework_version(void)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_FRAMEWORK_VERSION));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_FRAMEWORK_VERSION));
}
__attribute__((naked))
uint32_t psa_version(uint32_t sid)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_VERSION));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_VERSION));
}
__attribute__((naked))
psa_handle_t psa_connect(uint32_t sid, uint32_t minor_version)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_CONNECT));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_CONNECT));
}
__attribute__((naked))
@@ -41,15 +41,15 @@ psa_status_t psa_call(psa_handle_t handle,
psa_outvec *out_vec,
size_t out_len)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_CALL));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_CALL));
}
__attribute__((naked))
void psa_close(psa_handle_t handle)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_CLOSE));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_CLOSE));
}
diff --git a/secure_fw/core/ipc/psa_service.c b/secure_fw/core/ipc/psa_service.c
index 487197168e..cd2e1cd09f 100644
--- a/secure_fw/core/ipc/psa_service.c
+++ b/secure_fw/core/ipc/psa_service.c
@@ -15,25 +15,25 @@ __attribute__((naked))
psa_signal_t psa_wait(psa_signal_t signal_mask, uint32_t timeout)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_WAIT));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_WAIT));
}
__attribute__((naked))
psa_status_t psa_get(psa_signal_t signal, psa_msg_t *msg)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_GET));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_GET));
}
__attribute__((naked))
void psa_set_rhandle(psa_handle_t msg_handle, void *rhandle)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_SET_RHANDLE));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_SET_RHANDLE));
}
__attribute__((naked))
@@ -41,56 +41,56 @@ size_t psa_read(psa_handle_t msg_handle, uint32_t invec_idx,
void *buffer, size_t num_bytes)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_READ));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_READ));
}
__attribute__((naked))
size_t psa_skip(psa_handle_t msg_handle, uint32_t invec_idx, size_t num_bytes)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_SKIP));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_SKIP));
}
__attribute__((naked))
void psa_write(psa_handle_t msg_handle, uint32_t outvec_idx,
const void *buffer, size_t num_bytes)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_WRITE));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_WRITE));
}
__attribute__((naked))
void psa_reply(psa_handle_t msg_handle, psa_status_t retval)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_REPLY));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_REPLY));
}
__attribute__((naked))
void psa_notify(int32_t partition_id)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_NOTIFY));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_NOTIFY));
}
__attribute__((naked))
void psa_clear(void)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_CLEAR));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_CLEAR));
}
__attribute__((naked))
void psa_eoi(psa_signal_t irq_signal)
{
- __ASM("SVC %0 \n"
- "BX LR \n"
- : : "I" (TFM_SVC_PSA_EOI));
+ __ASM volatile("SVC %0 \n"
+ "BX LR \n"
+ : : "I" (TFM_SVC_PSA_EOI));
}
diff --git a/secure_fw/core/ipc/tfm_arch_v8m.c b/secure_fw/core/ipc/tfm_arch_v8m.c
index bbf597a56e..137c3e75b6 100644
--- a/secure_fw/core/ipc/tfm_arch_v8m.c
+++ b/secure_fw/core/ipc/tfm_arch_v8m.c
@@ -94,7 +94,7 @@ void tfm_initialize_context(struct tfm_state_context *ctx,
#if defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) void PendSV_Handler(void)
{
- __ASM(
+ __ASM volatile(
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@@ -111,7 +111,7 @@ __attribute__((naked)) void PendSV_Handler(void)
#elif defined(__ARM_ARCH_8M_BASE__)
__attribute__((naked)) void PendSV_Handler(void)
{
- __ASM(
+ __ASM volatile(
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@@ -143,14 +143,14 @@ __attribute__((naked)) void PendSV_Handler(void)
/* Reserved for future usage */
__attribute__((naked)) void MemManage_Handler(void)
{
- __ASM("b .");
+ __ASM volatile("b .");
}
__attribute__((naked)) void BusFault_Handler(void)
{
- __ASM("b .");
+ __ASM volatile("b .");
}
__attribute__((naked)) void UsageFault_Handler(void)
{
- __ASM("b .");
+ __ASM volatile("b .");
}
diff --git a/secure_fw/core/secure_utilities.h b/secure_fw/core/secure_utilities.h
index d2a7f45372..d367fe8400 100644
--- a/secure_fw/core/secure_utilities.h
+++ b/secure_fw/core/secure_utilities.h
@@ -49,9 +49,9 @@ struct tfm_exc_stack_t {
#endif
#define LOG_MSG_THR(MSG) \
- __ASM("MOV r0, %0\n" \
- "SVC %1\n" \
- : : "r" (MSG), "I" (TFM_SVC_PRINT))
+ __ASM volatile("MOV r0, %0\n" \
+ "SVC %1\n" \
+ : : "r" (MSG), "I" (TFM_SVC_PRINT))
#define LOG_MSG(MSG) \
do { \
@@ -101,7 +101,7 @@ __STATIC_INLINE void __set_CONTROL_SPSEL(uint32_t SPSEL)
ctrl.w = __get_CONTROL();
ctrl.b.SPSEL = SPSEL;
__set_CONTROL(ctrl.w);
- __asm("ISB");
+ __ISB();
}
#endif /* __SECURE_UTILITIES_H__ */
diff --git a/secure_fw/core/tfm_handler.c b/secure_fw/core/tfm_handler.c
index 42c5a1e636..ef07a13ac7 100644
--- a/secure_fw/core/tfm_handler.c
+++ b/secure_fw/core/tfm_handler.c
@@ -102,7 +102,7 @@ void HardFault_Handler(void)
#if defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) void SVC_Handler(void)
{
- __ASM(
+ __ASM volatile(
"TST lr, #4\n" /* Check store SP in thread mode to r0 */
"IT EQ\n"
"BXEQ lr\n"
@@ -115,7 +115,7 @@ __attribute__((naked)) void SVC_Handler(void)
#elif defined(__ARM_ARCH_8M_BASE__)
__attribute__((naked)) void SVC_Handler(void)
{
- __ASM(
+ __ASM volatile(
".syntax unified\n"
"MOVS r0, #4\n" /* Check store SP in thread mode to r0 */
"MOV r1, lr\n"
diff --git a/secure_fw/core/tfm_spm_services.c b/secure_fw/core/tfm_spm_services.c
index 7eb6165aa8..dadf66f02c 100644
--- a/secure_fw/core/tfm_spm_services.c
+++ b/secure_fw/core/tfm_spm_services.c
@@ -38,7 +38,7 @@ void jump_to_ns_code(void)
__attribute__((naked)) int32_t tfm_core_sfn_request(
const struct tfm_sfn_req_s *desc_ptr)
{
- __ASM(
+ __ASM volatile(
"PUSH {r4-r12, lr}\n"
"SVC %[SVC_REQ]\n"
"MOV r4, #0\n"
@@ -60,7 +60,7 @@ __attribute__((naked)) int32_t tfm_core_sfn_request(
__attribute__((naked)) int32_t tfm_core_sfn_request(
const struct tfm_sfn_req_s *desc_ptr)
{
- __ASM(
+ __ASM volatile(
".syntax unified\n"
"PUSH {lr}\n"
"PUSH {r4-r7}\n"
@@ -104,7 +104,7 @@ int32_t tfm_core_memory_permission_check(const void *ptr,
uint32_t len,
int32_t access)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_MEMORY_CHECK));
@@ -113,7 +113,7 @@ int32_t tfm_core_memory_permission_check(const void *ptr,
__attribute__((naked))
int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX LR\n"
: : "I" (TFM_SVC_GET_CALLER_CLIENT_ID));
@@ -122,7 +122,7 @@ int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id)
__attribute__((naked))
int32_t tfm_spm_request_reset_vote(void)
{
- __ASM(
+ __ASM volatile(
"MOVS R0, %0\n"
"B tfm_spm_request\n"
: : "I" (TFM_SPM_REQUEST_RESET_VOTE));
@@ -131,7 +131,7 @@ int32_t tfm_spm_request_reset_vote(void)
__attribute__((naked))
int32_t tfm_spm_request(void)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_SPM_REQUEST));
@@ -140,7 +140,7 @@ int32_t tfm_spm_request(void)
__attribute__((naked))
int32_t tfm_core_validate_secure_caller(void)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_VALIDATE_SECURE_CALLER));
@@ -149,7 +149,7 @@ int32_t tfm_core_validate_secure_caller(void)
__attribute__((naked))
int32_t tfm_core_set_buffer_area(enum tfm_buffer_share_region_e share)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_SET_SHARE_AREA));
@@ -160,7 +160,7 @@ int32_t tfm_core_get_boot_data(uint8_t major_type,
struct tfm_boot_data *boot_status,
uint32_t len)
{
- __ASM(
+ __ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_GET_BOOT_DATA));
diff --git a/secure_fw/core/tfm_svc.h b/secure_fw/core/tfm_svc.h
index 44ad9ff73d..e4ed34b1b6 100644
--- a/secure_fw/core/tfm_svc.h
+++ b/secure_fw/core/tfm_svc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -43,6 +43,6 @@ typedef enum {
#endif
} tfm_svc_number_t;
-#define SVC(code) __ASM("svc %0" : : "I" (code))
+#define SVC(code) __ASM volatile("svc %0" : : "I" (code))
#endif /* __TFM_SVC_H__ */