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authorAlamy Liu <alamy.liu@cypress.com>2019-11-21 19:35:54 -0800
committerDavid Hu <david.hu@arm.com>2020-01-21 08:14:58 +0000
commite3c75a4955e665e78d55b22f07db73d31a6bf101 (patch)
treef06b76cc17f6208e5d55f34aaecaddce76c763a1
parentcc419f9b1a38a8fa3173b26b11c3bbe09ef446b6 (diff)
downloadtrusted-firmware-m-e3c75a4955e665e78d55b22f07db73d31a6bf101.tar.gz
Platform: PSoC64: S-IRQ: timer interrupt handlers
1. Set the Timer IRQ Handlers at its IRQ numbers. 2. Mapping the TFM_TIMERx_IRQ to platform IRQ numbers. Secure Non-Secure ---------------------- ---------------------- TFM_TIMER0_IRQ_Handler TIMER1_Handler NvicMux3_IRQn (3) tcpwm_0_interrupts_1_IRQn (124) Change-Id: I3cd9565dfb8f5a157b09d134387c64344a7621d9 Signed-off-by: Alamy Liu <alamy.liu@cypress.com>
-rw-r--r--platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_ns.s9
-rw-r--r--platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_s.s7
-rw-r--r--platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_ns.S6
-rw-r--r--platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_s.S6
-rw-r--r--platform/ext/target/cypress/psoc64/tfm_peripherals_def.h13
5 files changed, 28 insertions, 13 deletions
diff --git a/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_ns.s b/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_ns.s
index 0ce210d4a..61d0a0cdb 100644
--- a/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_ns.s
+++ b/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_ns.s
@@ -1,6 +1,6 @@
;/*
; * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
-; * Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
+; * Copyright (c) 2019-2020, Cypress Semiconductor Corporation. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
@@ -61,6 +61,7 @@ __heap_limit
EXPORT __ramVectors
IMPORT Cy_SysIpcPipeIsrCm4
IMPORT Cy_Flash_ResumeIrqHandler
+ IMPORT TIMER1_Handler
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
@@ -204,7 +205,7 @@ __Vectors DCD __initial_sp ; Top of Stack
DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0
DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1
DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0
- DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1
+ DCD TIMER1_Handler ; TCPWM #0, Counter #1
DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2
DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3
DCD tcpwm_0_interrupts_4_IRQHandler ; TCPWM #0, Counter #4
@@ -459,7 +460,7 @@ Default_Handler PROC
EXPORT cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK]
EXPORT cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK]
EXPORT tcpwm_0_interrupts_0_IRQHandler [WEAK]
- EXPORT tcpwm_0_interrupts_1_IRQHandler [WEAK]
+ EXPORT TIMER1_Handler [WEAK]
EXPORT tcpwm_0_interrupts_2_IRQHandler [WEAK]
EXPORT tcpwm_0_interrupts_3_IRQHandler [WEAK]
EXPORT tcpwm_0_interrupts_4_IRQHandler [WEAK]
@@ -626,7 +627,7 @@ cpuss_interrupts_cm0_cti_1_IRQHandler
cpuss_interrupts_cm4_cti_0_IRQHandler
cpuss_interrupts_cm4_cti_1_IRQHandler
tcpwm_0_interrupts_0_IRQHandler
-tcpwm_0_interrupts_1_IRQHandler
+TIMER1_Handler
tcpwm_0_interrupts_2_IRQHandler
tcpwm_0_interrupts_3_IRQHandler
tcpwm_0_interrupts_4_IRQHandler
diff --git a/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_s.s b/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_s.s
index cbc81641a..647ac386e 100644
--- a/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_s.s
+++ b/platform/ext/target/cypress/psoc64/Device/Source/armclang/startup_psoc64_s.s
@@ -1,6 +1,6 @@
;/*
; * Copyright (c) 2017-2018 ARM Limited
-; * Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
+; * Copyright (c) 2019-2020, Cypress Semiconductor Corporation. All rights reserved.
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
@@ -47,6 +47,7 @@ CY_NMI_HANLDER_ADDR EQU 0x0000000D
IMPORT PendSV_Handler
IMPORT NvicMux7_IRQHandler
IMPORT Cy_SysIpcPipeIsrCm0
+ IMPORT TFM_TIMER0_IRQ_Handler
__Vectors ;Core Interrupts
DCD |Image$$ARM_LIB_STACK_MSP$$ZI$$Limit| ; Top of Stack
@@ -70,7 +71,7 @@ __Vectors ;Core Interrupts
DCD NvicMux0_IRQHandler ; CPU User Interrupt #0
DCD Cy_SysIpcPipeIsrCm0
DCD NvicMux2_IRQHandler ; CPU User Interrupt #2
- DCD NvicMux3_IRQHandler ; CPU User Interrupt #3
+ DCD TFM_TIMER0_IRQ_Handler ; Secure Timer IRQ
DCD NvicMux4_IRQHandler ; CPU User Interrupt #4
DCD NvicMux5_IRQHandler ; CPU User Interrupt #5
DCD NvicMux6_IRQHandler ; CPU User Interrupt #6
@@ -127,7 +128,7 @@ $handler_name PROC
Default_Handler SysTick_Handler
Default_Handler NvicMux0_IRQHandler
Default_Handler NvicMux2_IRQHandler
- Default_Handler NvicMux3_IRQHandler
+ Default_Handler TFM_TIMER0_IRQ_Handler
Default_Handler NvicMux4_IRQHandler
Default_Handler NvicMux5_IRQHandler
Default_Handler NvicMux6_IRQHandler
diff --git a/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_ns.S b/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_ns.S
index abdc5bb01..ea930e93d 100644
--- a/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_ns.S
+++ b/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_ns.S
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
- * Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
+ * Copyright (c) 2019-2020, Cypress Semiconductor Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -174,7 +174,7 @@ __Vectors:
.long cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */
.long cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */
.long tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */
- .long tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */
+ .long TIMER1_Handler /* TCPWM #0, Counter #1 */
.long tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */
.long tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */
.long tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */
@@ -611,7 +611,7 @@ Fault_Handler:
def_irq_handler cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */
def_irq_handler cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */
def_irq_handler tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */
- def_irq_handler tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */
+ def_irq_handler TIMER1_Handler /* TCPWM #0, Counter #1 */
def_irq_handler tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */
def_irq_handler tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */
def_irq_handler tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */
diff --git a/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_s.S b/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_s.S
index cb95acf44..323d1336a 100644
--- a/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_s.S
+++ b/platform/ext/target/cypress/psoc64/Device/Source/gcc/startup_psoc64_s.S
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
- * Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
+ * Copyright (c) 2019-2020, Cypress Semiconductor Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -56,7 +56,7 @@ __Vectors:
.long NvicMux0_IRQHandler /* CM0 + NVIC Mux input 0 */
.long Cy_SysIpcPipeIsrCm0
.long NvicMux2_IRQHandler /* CM0 + NVIC Mux input 2 */
- .long NvicMux3_IRQHandler /* CM0 + NVIC Mux input 3 */
+ .long TFM_TIMER0_IRQ_Handler /* Secure IRQ */
.long NvicMux4_IRQHandler /* CM0 + NVIC Mux input 4 */
.long NvicMux5_IRQHandler /* CM0 + NVIC Mux input 5 */
.long NvicMux6_IRQHandler /* CM0 + NVIC Mux input 6 */
@@ -335,7 +335,7 @@ Fault_Handler:
def_irq_handler NvicMux0_IRQHandler /* CPU User Interrupt #0 */
def_irq_handler NvicMux2_IRQHandler /* CPU User Interrupt #2 */
- def_irq_handler NvicMux3_IRQHandler /* CPU User Interrupt #3 */
+ def_irq_handler TFM_TIMER0_IRQ_Handler /* CPU User Interrupt #3 */
def_irq_handler NvicMux4_IRQHandler /* CPU User Interrupt #4 */
def_irq_handler NvicMux5_IRQHandler /* CPU User Interrupt #5 */
def_irq_handler NvicMux6_IRQHandler /* CPU User Interrupt #6 */
diff --git a/platform/ext/target/cypress/psoc64/tfm_peripherals_def.h b/platform/ext/target/cypress/psoc64/tfm_peripherals_def.h
index d99c0d34d..835822e22 100644
--- a/platform/ext/target/cypress/psoc64/tfm_peripherals_def.h
+++ b/platform/ext/target/cypress/psoc64/tfm_peripherals_def.h
@@ -9,6 +9,15 @@
#ifndef __TFM_PERIPHERALS_DEF_H__
#define __TFM_PERIPHERALS_DEF_H__
+#include "platform_irq.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TFM_TIMER0_IRQ (NvicMux3_IRQn)
+#define TFM_TIMER1_IRQ (tcpwm_0_interrupts_1_IRQn)
+
struct tfm_spm_partition_platform_data_t;
extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart;
@@ -20,4 +29,8 @@ extern struct tfm_spm_partition_platform_data_t tfm_peripheral_timer0;
#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#define TFM_PERIPHERAL_FPGA_IO (0)
+#ifdef __cplusplus
+}
+#endif
+
#endif /* __TFM_PERIPHERALS_DEF_H__ */