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authorChris Brand <chris.brand@cypress.com>2020-07-13 13:00:16 -0700
committerDavid Hu <david.hu@arm.com>2020-10-29 02:09:26 +0000
commit91d366f9415c24ea9bff1cc86bb32151414752ac (patch)
treec7b1bb40fd71d74c6e902a50b7c75ea81b029057
parent6959e8dee1595c8d5000e19437854da9b6c9cd5b (diff)
downloadtrusted-firmware-m-91d366f9415c24ea9bff1cc86bb32151414752ac.tar.gz
PSoC64: Move BSP changes to the TFM platform code
Commit c900ad932e4d0208fad4972e525bcf38eb186528 ("Platform: PSoC64: S-IRQ: enable Clocks for TCPWM0 Counters") made some changes to the (generated) BSP code. Move those changes to target_cfg.c instead. Change-Id: Idfd4f0cf01464874555b02c1718c1bc882aa53c1 Signed-off-by: Chris Brand <chris.brand@cypress.com>
-rw-r--r--platform/ext/target/cypress/psoc64/Native_Driver/generated_source/cycfg_peripherals.c4
-rw-r--r--platform/ext/target/cypress/psoc64/target_cfg.c10
2 files changed, 10 insertions, 4 deletions
diff --git a/platform/ext/target/cypress/psoc64/Native_Driver/generated_source/cycfg_peripherals.c b/platform/ext/target/cypress/psoc64/Native_Driver/generated_source/cycfg_peripherals.c
index 561e44cbe2..74bdea30df 100644
--- a/platform/ext/target/cypress/psoc64/Native_Driver/generated_source/cycfg_peripherals.c
+++ b/platform/ext/target/cypress/psoc64/Native_Driver/generated_source/cycfg_peripherals.c
@@ -35,8 +35,4 @@ cy_stc_csd_context_t cy_csd_0_context =
void init_cycfg_peripherals(void)
{
Cy_SysClk_PeriphAssignDivider(PCLK_CSD_CLOCK, CY_SYSCLK_DIV_8_BIT, 0U);
- /* Secure: TIMER0 */
- Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_8_BIT, 1U);
- /* Non-Secure: TIMER1 */
- Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS1, CY_SYSCLK_DIV_8_BIT, 1U);
}
diff --git a/platform/ext/target/cypress/psoc64/target_cfg.c b/platform/ext/target/cypress/psoc64/target_cfg.c
index 2a8e793807..a911edf30e 100644
--- a/platform/ext/target/cypress/psoc64/target_cfg.c
+++ b/platform/ext/target/cypress/psoc64/target_cfg.c
@@ -123,6 +123,16 @@ void platform_init(void)
if (clk_rc != CY_SYSCLK_SUCCESS) {
printf("WARNING: Failed to configure UART clock\n");
}
+ /* Secure: TIMER0 clock */
+ clk_rc = Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_8_BIT, 1U);
+ if (clk_rc != CY_SYSCLK_SUCCESS) {
+ printf("WARNING: Failed to configure timer0 clock\n");
+ }
+ /* Non-Secure: TIMER1 clock */
+ clk_rc = Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS1, CY_SYSCLK_DIV_8_BIT, 1U);
+ if (clk_rc != CY_SYSCLK_SUCCESS) {
+ printf("WARNING: Failed to configure timer1 clock\n");
+ }
Cy_Platform_Init();