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path: root/plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c
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2023-06-23chore(xilinx): follow kernel doc format for functional documentationPrasad Kummari
For TF-A, there is no format specified for functional documentation. For AMD-Xilinx platforms, following kernel-doc format for the functional documentation to make sure AMD-xilinx documentation is align with actual code. For example use kernel-doc from linux to call: <linux>/scripts/kernel-doc -man -v 1 >/dev/null file... Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Change-Id: Idcc9def408b6c8da35b36f67ef82fc00890e998c
2023-04-14style(xilinx): replace ARM by Arm in copyrightsMichal Simek
The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix") is enforcing proper case for ARM. That's why fix it in plat/xilinx to make sure that pre-commit.copyright won't be touching platform specific files. Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416 Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-27refactor(xilinx): move versal files to common placeJay Buddhabhatti
Moved necessary files to common place so that it can be used for Versal NET. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I611fa849207b082e6599acfb65c55d27b9c99435
2022-09-26fix(zynqmp): resolve misra 4.6 warningsHariBabu Gattem
MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information. Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com> Change-Id: I3779f7b6e074e33cb66ace3bef2117029badce1e
2022-09-19fix(zynqmp): resolve the misra 4.6 warningsHariBabu Gattem
MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information. Change-Id: Id85e69b29b124052b4a87462ce27fcdfc00c13c9 Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
2022-06-06fix(zynqmp): resolve the misra 4.6 warningsVenkatesh Yadav Abbarapu
MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c
2022-05-23feat(plat/xilinx/zynqmp): optimization on pinctrl_functionsRonak Jain
Optimizing the pinctrl_functions structure. Remove the pointer to array of u16 type which consumes a lot of memory (64bits pointer to array + 16B for END_OF_GROUPS + almost useless 8bits on every entry which is the same for every group) and add two new members of type u16 and u8 with the name called group_base and group_size respectively. The group_base member contains the base value of pinctrl group whereas the group_size member contains the total number of groups requested from the pinctrl function. Overall, it saves around ~2KB of RAM and ~0.7KB of code memory. Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Change-Id: I79b761b45df350d390fa344d411b340d9b2f13ac
2022-05-06fix(zynqmp): resolve misra R15.6 warningsVenkatesh Yadav Abbarapu
MISRA Violation: MISRA-C:2012 R.15.6 - The body of an iteration-statement or a selection-statement shall be a compound statement. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
2020-12-15zynqmp: pm: Reimplement pinctrl get/set config parameter EEMI API callsMirela Simonovic
Functions are reimplemented to issue system-level pinctrl EEMI calls to the PMU-FW rather than using MMIO read/write. Macros and functions that appear to be unused after the change is made are removed. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I51f2285a79f202cb2ca9f031044002e16dd1e92f
2020-12-15zynqmp: pm: Reimplement pinctrl set/get function EEMI APIMirela Simonovic
Functions are reimplemented to issue system-level pinctrl EEMI calls to the PMU-FW rather than using MMIO read/write. Macros and functions that appear to be unused after the change is made are removed. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I21b8fda855aa69090b85d6aaf411e19560201cb5
2020-12-15zynqmp: pm: Update return type in query functionsRajan Vaja
In pm_query_data() function return type is stored in response so there is no use of return type. Update return type of function pm_query_data() from enum pm_ret_status to void. Similarly update return type of pm_api_clock_get_name() and pm_api_pinctrl_get_function_name() functions. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: Id811926f0b4ebcc472480bb94f3b88109eb036cd
2020-01-22Xilinx zynqmp: add missing pin control group for ethernet 0.Norbert Werner
Signed-off-by: Norbert Werner <opensource@lab-w.org> Change-Id: I3264515e5901689328861964ff664ff08b6e852c
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-03-15zynqmp: pm: Minor corrections for MISRA complianceJolly Shah
Various changes to comply with MISRA static analysis rules Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15zynqmp: pm_service: Support multiple SDIO modesRajan Vaja
Existing database allows to set only single mode for SDIO. SDIO can have different groups (8 bit, 4 bit and 1 bit). As there is only single SDIO group in each pin, it is not possible to use different mode groups for SDIO. Extend database in generic way to allow multiuple function groups in single pin. Add different SDIO groups to pins and create separate functions for each modes. Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
2018-03-15zynqmp: pm: Add APIs for pin control queriesRajan Vaja
Add pin control APIs which driver can use to query pin information from firmware. Using these APIs, driver do not need to maintain hard-coded pin database. Major changes in patch are: - Add pin database with pins, functions and function groups information - Implement APIs for pin information queries - Update pin control APIs for get/set functions to use new pin control database. Remove pin database which was added earlier. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15zynqmp: pm: Implement pin control APIs for configurationsRajan Vaja
Implement pin control APIs which uses MMIO operations to set/get values of configuration parameters. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15zynqmp: pm: Implement pin control APIs for get/set functionsRajan Vaja
Implement pin control APIs which uses MMIO operations to set/get functions for the given pin. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>