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path: root/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
AgeCommit message (Expand)Author
2020-08-31Tegra186: sanity check power state typeVarun Wadekar
2020-03-18Tegra186: system resume from TZSRAM memoryVarun Wadekar
2020-03-18Tegra186: disable PROGRAMMABLE_RESET_ADDRESSVarun Wadekar
2020-03-11Tegra: smmu: remove context save sequencePritesh Raithatha
2020-03-11Tegra: bpmp: fixup TEGRA_CLK_SE values for Tegra186/Tegra194Varun Wadekar
2020-03-09Tegra186: add SE support to generate SHA256 of TZRAMJeetesh Burman
2020-01-31Tegra: remove weakly defined PSCI platform handlersVarun Wadekar
2019-02-07Tegra186: use common 'BL31_BASE' variableVarun Wadekar
2019-01-23Tegra186: save system suspend entry marker to TZDRAMVarun Wadekar
2019-01-23Tegra186: helper functions for CPU rst handler and SMMU ctx offsetVarun Wadekar
2019-01-23Tegra: rename secure scratch register macrosSteven Kao
2019-01-23Tegra186: sanity check target cluster during core power onVarun Wadekar
2019-01-23Tegra186: fix MISRA Rule 8.3 violationAnthony Zhou
2019-01-18Tegra: fix defects flagged by MISRA Rule 10.3Anthony Zhou
2019-01-18Tegra186: fix defects flagged by MISRA scanAnthony Zhou
2019-01-18Tegra186: reduce complexity for the 'get_target_pwr_state' handlerVarun Wadekar
2019-01-16Tegra186: PM: fix MISRA defects in plat_psci_handlers.cAnthony Zhou
2019-01-16Tegra186: remove support for Quasi System power off (SC8) stateVarun Wadekar
2019-01-16Tegra: support to set the L2 ECC and Parity enable bitHarvey Hsieh
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
2018-08-22libc: Fix all includes in codebaseAntonio Nino Diaz
2017-06-14Tegra: enable 'signed-comparison' compilation warning/errorsVarun Wadekar
2017-05-03Use SPDX license identifiersdp-arm
2017-05-01Tegra186: calculate proper power state for cluster/system power downVarun Wadekar
2017-04-20Tegra: smmu: make the context save sequence robustVarun Wadekar
2017-04-07Tegra186: PSCI: support for 64-bit TZDRAM baseSteven Kao
2017-04-05Tegra186: use MSB of wake_timeKrishna Sitaraman
2017-04-05Tegra186: clean CPU wake times from L2 cacheMustafa Yigit Bilgen
2017-03-30Tegra186: implement `get_target_pwr_state` handlerVarun Wadekar
2017-03-27Tegra186: reset CPU power state info while onliningVarun Wadekar
2017-03-23Tegra186: reset power state info during CPU_ONVarun Wadekar
2017-03-23Tegra186: fix programming sequence for SC7/SC8 entryVarun Wadekar
2017-03-23Tegra186: program default core wake mask during CPU_SUSPENDVarun Wadekar
2017-03-23Tegra186: clear the system cstate for offline coreVarun Wadekar
2017-03-23Tegra186: save/restore BL31 context to/from TZDRAMVarun Wadekar
2017-03-22Tegra186: implement support for System SuspendVarun Wadekar
2017-03-20Tegra186: implement quasi power off (SC8) stateVarun Wadekar
2017-03-20Tegra186: disable DCO operations for PSCI_CPU_OFFVarun Wadekar
2017-03-20Tegra186: fix per-cpu wake times for CPU power statesVarun Wadekar
2017-03-20Tegra186: support for C6/C7 CPU_SUSPEND statesVarun Wadekar
2017-03-20Tegra186: support for the latest platform port handlersVarun Wadekar
2017-03-20Tegra186: implement prepare_system_reset handlerVarun Wadekar
2017-03-20Tegra186: implement CPU_OFF handlerVarun Wadekar
2017-03-20Tegra186: implement prepare_system_off handlerVarun Wadekar
2017-03-20Tegra186: power on/off secondary CPUsVarun Wadekar
2017-03-20Tegra186: platform support for Tegra "T186" SoCVarun Wadekar