diff options
author | Kalyani Akula <kalyania@xilinx.com> | 2020-11-22 22:42:10 -0800 |
---|---|---|
committer | Manish Pandey <manish.pandey2@arm.com> | 2021-01-04 11:50:02 +0000 |
commit | d716f045f280596f6b8aa3b4cc12615af821d1e3 (patch) | |
tree | 80157f088c3d2b02f2484efb3482c3131957b7be /plat | |
parent | 484752f324180e74b18deecdd864e5d798b0d438 (diff) | |
download | trusted-firmware-a-d716f045f280596f6b8aa3b4cc12615af821d1e3.tar.gz |
zynqmp : pm : Adds new zynqmp-pm api SMC call for register access
This patch adds new zynqmp-pm api to provide read/write access to
CSU or PMU global registers.
Signed-off-by: Kalyani Akula <kalyania@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I4fd52eb732fc3e6a8bccd96cad7dc090b2161042
Diffstat (limited to 'plat')
-rw-r--r-- | plat/xilinx/zynqmp/include/zynqmp_def.h | 6 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/pm_api_sys.c | 45 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/pm_api_sys.h | 10 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/pm_defs.h | 4 | ||||
-rw-r--r-- | plat/xilinx/zynqmp/pm_service/pm_svc_main.c | 9 |
5 files changed, 73 insertions, 1 deletions
diff --git a/plat/xilinx/zynqmp/include/zynqmp_def.h b/plat/xilinx/zynqmp/include/zynqmp_def.h index 461439530f..b492210b00 100644 --- a/plat/xilinx/zynqmp/include/zynqmp_def.h +++ b/plat/xilinx/zynqmp/include/zynqmp_def.h @@ -350,4 +350,10 @@ #define AFIFM6_WRCTRL U(13) #define FABRIC_WIDTH U(3) +/* CSUDMA Module Base Address*/ +#define CSUDMA_BASE 0xFFC80000 + +/* RSA-CORE Module Base Address*/ +#define RSA_CORE_BASE 0xFFCE0000 + #endif /* ZYNQMP_DEF_H */ diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c index 1ec06f9d00..9a1f1b486c 100644 --- a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c +++ b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c @@ -1546,3 +1546,48 @@ enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode) PM_PACK_PAYLOAD2(payload, PM_PLL_GET_MODE, nid); return pm_ipi_send_sync(primary_proc, payload, mode, 1); } + +/** + * pm_register_access() - PM API for register read/write access data + * + * @register_access_id Register_access_id which says register read/write + * + * @address Address of the register to be accessed + * + * @mask Mask value to be used while writing value + * + * @value Value to be written to register + * + * @out Returned output data + * + * This function returns requested data. + * + * @return Returns status, either success or error+reason + */ +enum pm_ret_status pm_register_access(unsigned int register_access_id, + unsigned int address, + unsigned int mask, + unsigned int value, + unsigned int *out) +{ + enum pm_ret_status ret; + + if (((ZYNQMP_CSU_BASEADDR & address) != ZYNQMP_CSU_BASEADDR) && + ((CSUDMA_BASE & address) != CSUDMA_BASE) && + ((RSA_CORE_BASE & address) != RSA_CORE_BASE) && + ((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) + return PM_RET_ERROR_ACCESS; + + switch (register_access_id) { + case CONFIG_REG_WRITE: + ret = pm_mmio_write(address, mask, value); + break; + case CONFIG_REG_READ: + ret = pm_mmio_read(address, out); + break; + default: + ret = PM_RET_ERROR_ARGS; + WARN("Unimplemented register_access call\n\r"); + } + return ret; +} diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_sys.h b/plat/xilinx/zynqmp/pm_service/pm_api_sys.h index 930e4702f5..60fc303fe7 100644 --- a/plat/xilinx/zynqmp/pm_service/pm_api_sys.h +++ b/plat/xilinx/zynqmp/pm_service/pm_api_sys.h @@ -28,6 +28,11 @@ enum pm_query_id { PM_QID_CLOCK_GET_MAX_DIVISOR, }; +enum pm_register_access_id { + CONFIG_REG_WRITE, + CONFIG_REG_READ, +}; + /********************************************************** * System-level API function declarations **********************************************************/ @@ -175,6 +180,11 @@ enum pm_ret_status pm_fpga_read(uint32_t reg_numframes, enum pm_ret_status pm_aes_engine(uint32_t address_high, uint32_t address_low, uint32_t *value); +enum pm_ret_status pm_register_access(unsigned int register_access_id, + unsigned int address, + unsigned int mask, + unsigned int value, + unsigned int *out); enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid, enum pm_pll_param param_id, diff --git a/plat/xilinx/zynqmp/pm_service/pm_defs.h b/plat/xilinx/zynqmp/pm_service/pm_defs.h index 4776d424bc..8b28807b7e 100644 --- a/plat/xilinx/zynqmp/pm_service/pm_defs.h +++ b/plat/xilinx/zynqmp/pm_service/pm_defs.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -97,6 +97,8 @@ enum pm_api_id { PM_PLL_GET_PARAMETER, PM_PLL_SET_MODE, PM_PLL_GET_MODE, + /* PM Register Access API */ + PM_REGISTER_ACCESS, PM_API_MAX }; diff --git a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c index 14321ec779..bf608dbd3d 100644 --- a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c +++ b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c @@ -606,6 +606,15 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32)); } + case PM_REGISTER_ACCESS: + { + uint32_t value; + + ret = pm_register_access(pm_arg[0], pm_arg[1], pm_arg[2], + pm_arg[3], &value); + SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + } + default: WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid); SMC_RET1(handle, SMC_UNK); |