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author | Benjamin Fair <b-fair@ti.com> | 2016-10-18 14:32:06 -0500 |
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committer | Andrew F. Davis <afd@ti.com> | 2018-06-19 11:45:31 -0500 |
commit | 89574715721d8aee98b2ea1fc2383e49387e9fea (patch) | |
tree | f5ffbcf2b040ed7374f5337b7167441301333a09 /plat/ti/k3/include/platform_def.h | |
parent | 1841c533c90ff560230b4d3c497356f8ac4210a2 (diff) | |
download | trusted-firmware-a-89574715721d8aee98b2ea1fc2383e49387e9fea.tar.gz |
ti: k3: common: Add platform core management helpers
The K3 family of SoCs has multiple interconnects. The key interconnect
for high performance processors is the MSMC3 interconnect. This is
an io-coherent interconnect which exports multiple ports for each
processor cluster.
Sometimes, port 0 of the MSMC may not have an ARM cluster OR is isolated
such that the instance of ATF does not manage it. Define macros
in platform_def.h to help handle this.
Signed-off-by: Benjamin Fair <b-fair@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Diffstat (limited to 'plat/ti/k3/include/platform_def.h')
-rw-r--r-- | plat/ti/k3/include/platform_def.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h index eaeef5a21d..bac8af1958 100644 --- a/plat/ti/k3/include/platform_def.h +++ b/plat/ti/k3/include/platform_def.h @@ -22,6 +22,46 @@ #define PLATFORM_STACK_SIZE 0x1000 #endif +#define PLATFORM_SYSTEM_COUNT 1 +#define PLATFORM_CORE_COUNT (K3_CLUSTER0_CORE_COUNT + \ + K3_CLUSTER1_CORE_COUNT + \ + K3_CLUSTER2_CORE_COUNT + \ + K3_CLUSTER3_CORE_COUNT) + +#define PLATFORM_CLUSTER_COUNT ((K3_CLUSTER0_MSMC_PORT != UNUSED) + \ + (K3_CLUSTER1_MSMC_PORT != UNUSED) + \ + (K3_CLUSTER2_MSMC_PORT != UNUSED) + \ + (K3_CLUSTER3_MSMC_PORT != UNUSED)) + +#define UNUSED -1 + +#if !defined(K3_CLUSTER1_CORE_COUNT) || !defined(K3_CLUSTER1_MSMC_PORT) +#define K3_CLUSTER1_CORE_COUNT 0 +#define K3_CLUSTER1_MSMC_PORT UNUSED +#endif + +#if !defined(K3_CLUSTER2_CORE_COUNT) || !defined(K3_CLUSTER2_MSMC_PORT) +#define K3_CLUSTER2_CORE_COUNT 0 +#define K3_CLUSTER2_MSMC_PORT UNUSED +#endif + +#if !defined(K3_CLUSTER3_CORE_COUNT) || !defined(K3_CLUSTER3_MSMC_PORT) +#define K3_CLUSTER3_CORE_COUNT 0 +#define K3_CLUSTER3_MSMC_PORT UNUSED +#endif + +#if K3_CLUSTER0_MSMC_PORT == UNUSED +#error "ARM cluster 0 must be used" +#endif + +#if ((K3_CLUSTER1_MSMC_PORT == UNUSED) && (K3_CLUSTER1_CORE_COUNT != 0)) || \ + ((K3_CLUSTER2_MSMC_PORT == UNUSED) && (K3_CLUSTER2_CORE_COUNT != 0)) || \ + ((K3_CLUSTER3_MSMC_PORT == UNUSED) && (K3_CLUSTER3_CORE_COUNT != 0)) +#error "Unused ports must have 0 ARM cores" +#endif + +#define PLATFORM_CLUSTER_OFFSET K3_CLUSTER0_MSMC_PORT + #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ PLATFORM_CORE_COUNT) #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1 |