aboutsummaryrefslogtreecommitdiff
path: root/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
diff options
context:
space:
mode:
authorVarun Wadekar <vwadekar@nvidia.com>2016-03-28 15:11:43 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2017-03-23 14:19:41 -0700
commit50f38a4a53d4c5804db56cc1c2db2d9e5b443cea (patch)
tree54beb4ae7d412482a0b2de65b3cc0aca34516d3a /plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
parent1b9ab0542e5b7ef1627e46fb6b57f183ff72c135 (diff)
downloadtrusted-firmware-a-50f38a4a53d4c5804db56cc1c2db2d9e5b443cea.tar.gz
Tegra186: fix programming sequence for SC7/SC8 entry
This patch fixes the programming sequence for 'System Suspend' and 'Quasi power down' state entry. The device needs to update the required power state before querying the MCE firmware to see the entry to that power state is allowed. Original change by Allen Yu <alleny@nvidia.com> Change-Id: I65e03754322188af913fabf41f29d1c3595afd85 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/soc/t186/plat_psci_handlers.c')
-rw-r--r--plat/nvidia/tegra/soc/t186/plat_psci_handlers.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
index 536ecbf04f..8911e8f617 100644
--- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
@@ -150,14 +150,6 @@ int tegra_soc_pwr_domain_suspend(const psci_power_state_t *target_state)
} else if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) {
- /* loop until SC7 is allowed */
- do {
- val = mce_command_handler(MCE_CMD_IS_SC7_ALLOWED,
- TEGRA_ARI_CORE_C7,
- MCE_CORE_SLEEP_TIME_INFINITE,
- 0);
- } while (val == 0);
-
/* save SE registers */
se_regs[0] = mmio_read_32(TEGRA_SE0_BASE +
SE_MUTEX_WATCHDOG_NS_LIMIT);
@@ -184,6 +176,14 @@ int tegra_soc_pwr_domain_suspend(const psci_power_state_t *target_state)
(void)mce_command_handler(MCE_CMD_UPDATE_CSTATE_INFO,
TEGRA_ARI_CLUSTER_CC7, 0, TEGRA_ARI_SYSTEM_SC7);
+ /* Loop until system suspend is allowed */
+ do {
+ val = mce_command_handler(MCE_CMD_IS_SC7_ALLOWED,
+ TEGRA_ARI_CORE_C7,
+ MCE_CORE_SLEEP_TIME_INFINITE,
+ 0);
+ } while (val == 0);
+
/* Instruct the MCE to enter system suspend state */
(void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
TEGRA_ARI_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);
@@ -314,6 +314,13 @@ __dead2 void tegra_soc_prepare_system_off(void)
} else if (tegra186_system_powerdn_state == TEGRA_ARI_SYSTEM_SC8) {
+ /* Prepare for quasi power down */
+ write_ctx_reg(gp_regs, CTX_GPREG_X4, 1);
+ write_ctx_reg(gp_regs, CTX_GPREG_X5, 0);
+ write_ctx_reg(gp_regs, CTX_GPREG_X6, 1);
+ (void)mce_command_handler(MCE_CMD_UPDATE_CSTATE_INFO,
+ TEGRA_ARI_CLUSTER_CC7, 0, TEGRA_ARI_SYSTEM_SC8);
+
/* loop until other CPUs power down */
do {
val = mce_command_handler(MCE_CMD_IS_SC7_ALLOWED,
@@ -322,13 +329,6 @@ __dead2 void tegra_soc_prepare_system_off(void)
0);
} while (val == 0);
- /* Prepare for quasi power down */
- write_ctx_reg(gp_regs, CTX_GPREG_X4, 1);
- write_ctx_reg(gp_regs, CTX_GPREG_X5, 0);
- write_ctx_reg(gp_regs, CTX_GPREG_X6, 1);
- (void)mce_command_handler(MCE_CMD_UPDATE_CSTATE_INFO,
- TEGRA_ARI_CLUSTER_CC7, 0, TEGRA_ARI_SYSTEM_SC8);
-
/* Enter quasi power down state */
(void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
TEGRA_ARI_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);