diff options
author | Marvin Hsu <marvinh@nvidia.com> | 2017-04-12 20:40:27 +0800 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-01-16 10:08:32 -0800 |
commit | d3b71331eb61b416abc1fcd119ad50e95584e014 (patch) | |
tree | 1fff190eee716f1f9588c0ac919eab7e4ecd8b87 /plat/nvidia/tegra/common/tegra_platform.c | |
parent | 7b3b41d6766e61c5b61259dc4ba100befffd2769 (diff) | |
download | trusted-firmware-a-d3b71331eb61b416abc1fcd119ad50e95584e014.tar.gz |
Tegra: platform: helper functions to read chip ID
This patch adds helper functions to find out the chip ID of the
Tegra SoC.
Change-Id: Ia3901dc7cdf77d8c23884d1ed38a80dba6a8afde
Signed-off-by: Marvin Hsu <marvinh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/common/tegra_platform.c')
-rw-r--r-- | plat/nvidia/tegra/common/tegra_platform.c | 45 |
1 files changed, 18 insertions, 27 deletions
diff --git a/plat/nvidia/tegra/common/tegra_platform.c b/plat/nvidia/tegra/common/tegra_platform.c index 9246d52d80..adf252b53b 100644 --- a/plat/nvidia/tegra/common/tegra_platform.c +++ b/plat/nvidia/tegra/common/tegra_platform.c @@ -10,7 +10,6 @@ #include <tegra_def.h> #include <tegra_platform.h> #include <tegra_private.h> -#include <utils_def.h> /******************************************************************************* * Tegra platforms @@ -38,18 +37,6 @@ typedef enum tegra_platform { #define TEGRA_MINOR_VIRT_DEV_KIT U(6) /******************************************************************************* - * Tegra major, minor version helper macros - ******************************************************************************/ -#define MAJOR_VERSION_SHIFT U(0x4) -#define MAJOR_VERSION_MASK U(0xF) -#define MINOR_VERSION_SHIFT U(0x10) -#define MINOR_VERSION_MASK U(0xF) -#define CHIP_ID_SHIFT U(8) -#define CHIP_ID_MASK U(0xFF) -#define PRE_SI_PLATFORM_SHIFT U(0x14) -#define PRE_SI_PLATFORM_MASK U(0xF) - -/******************************************************************************* * Tegra macros defining all the SoC pre_si_platform ******************************************************************************/ #define TEGRA_PRE_SI_QT U(1) @@ -93,33 +80,38 @@ uint32_t tegra_get_chipid_minor(void) return (tegra_get_chipid() >> MINOR_VERSION_SHIFT) & MINOR_VERSION_MASK; } -uint8_t tegra_chipid_is_t132(void) +/* + * Read the chip's pre_si_platform valus from the chip ID value + */ +static uint32_t tegra_get_chipid_pre_si_platform(void) { - uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; + return (tegra_get_chipid() >> PRE_SI_PLATFORM_SHIFT) & PRE_SI_PLATFORM_MASK; +} - return (chip_id == TEGRA_CHIPID_TEGRA13); +bool tegra_chipid_is_t132(void) +{ + uint32_t chip_id = ((tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK); + + return (chip_id == (uint32_t)TEGRA_CHIPID_TEGRA13); } -uint8_t tegra_chipid_is_t210(void) +bool tegra_chipid_is_t186(void) { uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; - return (chip_id == TEGRA_CHIPID_TEGRA21); + return (chip_id == TEGRA_CHIPID_TEGRA18); } -uint8_t tegra_chipid_is_t186(void) +bool tegra_chipid_is_t210(void) { uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; - return (chip_id == TEGRA_CHIPID_TEGRA18); + return (chip_id == (uint32_t)TEGRA_CHIPID_TEGRA21); } -/* - * Read the chip's pre_si_platform valus from the chip ID value - */ -static uint32_t tegra_get_chipid_pre_si_platform(void) +bool tegra_chipid_is_t210_b01(void) { - return (tegra_get_chipid() >> PRE_SI_PLATFORM_SHIFT) & PRE_SI_PLATFORM_MASK; + return (tegra_chipid_is_t210() && (tegra_get_chipid_major() == 0x2UL)); } /* @@ -178,8 +170,8 @@ static tegra_platform_t tegra_get_platform(void) case TEGRA_MINOR_VIRT_DEV_KIT: ret = TEGRA_PLATFORM_VIRT_DEV_KIT; break; + default: - assert(0); ret = TEGRA_PLATFORM_MAX; break; } @@ -227,7 +219,6 @@ static tegra_platform_t tegra_get_platform(void) break; default: - assert(0); ret = TEGRA_PLATFORM_MAX; break; } |