diff options
author | Konstantin Porotchkin <kostap@marvell.com> | 2019-03-31 17:16:35 +0300 |
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committer | Marcin Wojtas <mw@semihalf.com> | 2020-06-19 18:03:29 +0200 |
commit | 85440805d46646871dc9b2934a0a3932b44df7d4 (patch) | |
tree | 403d2a6930f6b3e67312aff8afa9ea633d855ee3 /plat/marvell | |
parent | 94d6f48368d355406fc2f2e34333e905d7e6ea7c (diff) | |
download | trusted-firmware-a-85440805d46646871dc9b2934a0a3932b44df7d4.tar.gz |
plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms
Extend the CCU tables with secure SRAM window in all board
setups that uses SoCs based on AP806/AP807 North Bridges
Change-Id: I4dc315e4ea847562ac8648d8a8739244b548c70e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Diffstat (limited to 'plat/marvell')
4 files changed, 12 insertions, 0 deletions
diff --git a/plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c b/plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c index d126f5567f..7d30ebe5a7 100644 --- a/plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c +++ b/plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c @@ -102,6 +102,9 @@ struct addr_map_win ccu_memory_map[] = { /* IO window */ #ifdef IMAGE_BLE {0x00000000f2000000, 0x4000000, IO_0_TID}, /* IO window */ #else +#if LLC_SRAM + {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, SRAM_TID}, +#endif {0x00000000f2000000, 0xe000000, IO_0_TID}, {0x00000000c0000000, 0x30000000, IO_0_TID}, /* IO window */ {0x0000000800000000, 0x100000000, IO_0_TID}, /* IO window */ diff --git a/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c b/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c index f8a1c40be7..7fc33f1f90 100644 --- a/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c +++ b/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c @@ -93,6 +93,9 @@ struct addr_map_win ccu_memory_map[] = { #ifdef IMAGE_BLE {0x00000000f2000000, 0x4000000, IO_0_TID}, /* IO window */ #else +#if LLC_SRAM + {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, SRAM_TID}, +#endif {0x00000000f2000000, 0xe000000, IO_0_TID}, {0x00000000c0000000, 0x30000000, IO_0_TID}, /* IO window */ {0x0000000800000000, 0x200000000, IO_0_TID}, /* IO window */ diff --git a/plat/marvell/armada/a8k/a80x0/board/marvell_plat_config.c b/plat/marvell/armada/a8k/a80x0/board/marvell_plat_config.c index 7901dd225c..856c07a6e3 100644 --- a/plat/marvell/armada/a8k/a80x0/board/marvell_plat_config.c +++ b/plat/marvell/armada/a8k/a80x0/board/marvell_plat_config.c @@ -131,6 +131,9 @@ struct addr_map_win ccu_memory_map[] = { #ifdef IMAGE_BLE {0x00000000f2000000, 0x4000000, IO_0_TID}, /* IO window */ #else +#if LLC_SRAM + {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, SRAM_TID}, +#endif {0x00000000f2000000, 0xe000000, IO_0_TID}, /* IO window */ {0x00000000c0000000, 0x30000000, IO_0_TID}, /* IO window */ {0x0000000800000000, 0x100000000, IO_0_TID}, /* IO window */ diff --git a/plat/marvell/armada/a8k/a80x0_mcbin/board/marvell_plat_config.c b/plat/marvell/armada/a8k/a80x0_mcbin/board/marvell_plat_config.c index fa4e144c91..0edc977458 100644 --- a/plat/marvell/armada/a8k/a80x0_mcbin/board/marvell_plat_config.c +++ b/plat/marvell/armada/a8k/a80x0_mcbin/board/marvell_plat_config.c @@ -165,6 +165,9 @@ struct addr_map_win ccu_memory_map[] = { #ifdef IMAGE_BLE {0x00000000f2000000, 0x4000000, IO_0_TID}, /* IO window */ #else +#if LLC_SRAM + {PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, SRAM_TID}, +#endif {0x00000000f2000000, 0xe000000, IO_0_TID}, /* IO window */ {0x00000000c0000000, 0x30000000, IO_0_TID}, /* IO window */ {0x0000000800000000, 0x100000000, IO_0_TID}, /* IO window */ |