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authorJacky Bai <ping.bai@nxp.com>2020-07-22 16:00:50 +0800
committerManish Pandey <manish.pandey2@arm.com>2020-08-19 09:46:11 +0000
commitfb9212be174810096b88d8b8e8686bac17f9c401 (patch)
treeb94d263df4f33e46abed97f48a0cb342134a8fb1 /plat/imx
parent9eb1bb63e1d51dd85402227f7d904ae004ef49d9 (diff)
downloadtrusted-firmware-a-fb9212be174810096b88d8b8e8686bac17f9c401.tar.gz
plat: imx8m: Correct the imr mask reg offset
The number of gpc imr mask reg & the offset is different on some SOC, so correct it & replace the magic number with macro define. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74
Diffstat (limited to 'plat/imx')
-rw-r--r--plat/imx/imx8m/gpc_common.c2
-rw-r--r--plat/imx/imx8m/imx8mm/include/gpc_reg.h2
-rw-r--r--plat/imx/imx8m/imx8mn/include/gpc_reg.h2
-rw-r--r--plat/imx/imx8m/imx8mp/include/gpc_reg.h2
-rw-r--r--plat/imx/imx8m/imx8mq/include/gpc_reg.h2
-rw-r--r--plat/imx/imx8m/include/gpc.h1
6 files changed, 9 insertions, 2 deletions
diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c
index 8aae1a62b4..babcecff08 100644
--- a/plat/imx/imx8m/gpc_common.c
+++ b/plat/imx/imx8m/gpc_common.c
@@ -16,7 +16,7 @@
#include <imx8m_psci.h>
#include <plat_imx8.h>
-static uint32_t gpc_imr_offset[] = { 0x30, 0x40, 0x1c0, 0x1d0, };
+static uint32_t gpc_imr_offset[] = { IMR1_CORE0_A53, IMR1_CORE1_A53, IMR1_CORE2_A53, IMR1_CORE3_A53, };
#pragma weak imx_set_cpu_pwr_off
#pragma weak imx_set_cpu_pwr_on
diff --git a/plat/imx/imx8m/imx8mm/include/gpc_reg.h b/plat/imx/imx8m/imx8mm/include/gpc_reg.h
index c697af29b5..1a4eae5463 100644
--- a/plat/imx/imx8m/imx8mm/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mm/include/gpc_reg.h
@@ -124,4 +124,6 @@
#define VPU_G2_PGC 0xf00
#define VPU_H1_PGC 0xf40
+#define IRQ_IMR_NUM U(4)
+
#endif /* GPC_REG_H */
diff --git a/plat/imx/imx8m/imx8mn/include/gpc_reg.h b/plat/imx/imx8m/imx8mn/include/gpc_reg.h
index fd10438a46..8a81368146 100644
--- a/plat/imx/imx8m/imx8mn/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mn/include/gpc_reg.h
@@ -106,4 +106,6 @@
#define GPUMIX_PGC 0xdc0
#define DISPMIX_PGC 0xe80
+#define IRQ_IMR_NUM U(4)
+
#endif /* GPC_REG_H */
diff --git a/plat/imx/imx8m/imx8mp/include/gpc_reg.h b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
index 12da6ac7e3..7909937b2e 100644
--- a/plat/imx/imx8m/imx8mp/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
@@ -146,4 +146,6 @@
#define MEDIAMIX_ISPDWP_PGC 0xf80
#define DDRMIX_PGC 0xfc0
+#define IRQ_IMR_NUM U(5)
+
#endif /* GPC_REG_H */
diff --git a/plat/imx/imx8m/imx8mq/include/gpc_reg.h b/plat/imx/imx8m/imx8mq/include/gpc_reg.h
index 9f472d609e..f171bd9d02 100644
--- a/plat/imx/imx8m/imx8mq/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mq/include/gpc_reg.h
@@ -84,4 +84,6 @@
#define MASTER1_MAPPING BIT(1)
#define MASTER2_MAPPING BIT(2)
+#define IRQ_IMR_NUM U(4)
+
#endif /* GPC_REG_H */
diff --git a/plat/imx/imx8m/include/gpc.h b/plat/imx/imx8m/include/gpc.h
index 89a0b9d396..6f86e1d6bd 100644
--- a/plat/imx/imx8m/include/gpc.h
+++ b/plat/imx/imx8m/include/gpc.h
@@ -25,7 +25,6 @@
#define SLTx_CFG(n) ((SLT0_CFG + ((n) * 4)))
#define SLT_COREx_PUP(core_id) (0x2 << ((core_id) * 2))
-#define IRQ_IMR_NUM 4
#define IMR_MASK_ALL 0xffffffff
#define IMX_PD_DOMAIN(name, on) \