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authorDimitris Papastamos <dimitris.papastamos@arm.com>2018-03-29 09:59:52 +0100
committerGitHub <noreply@github.com>2018-03-29 09:59:52 +0100
commite74af2afd0886a1b425757ff348396bffd0a580e (patch)
tree34de46f0991d30b29e21fbcb0df1bdf38ce14f12 /plat/hisilicon
parent0b7477234a5b9c46eedbdeb69ccec6ccf3872465 (diff)
parent9f85f9e3796f1c351bbc4c8436dc66d83c140b71 (diff)
downloadtrusted-firmware-a-e74af2afd0886a1b425757ff348396bffd0a580e.tar.gz
Merge pull request #1335 from JoelHutton/jh/cleanup_void_pointers
Clean usage of void pointers to access symbols
Diffstat (limited to 'plat/hisilicon')
-rw-r--r--plat/hisilicon/hikey/hikey_bl1_setup.c21
-rw-r--r--plat/hisilicon/hikey960/hikey960_bl1_setup.c16
-rw-r--r--plat/hisilicon/poplar/bl1_plat_setup.c13
3 files changed, 7 insertions, 43 deletions
diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
index b19de0530a..28ad9df224 100644
--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
@@ -23,23 +23,6 @@
#include "../../bl1/bl1_private.h"
#include "hikey_private.h"
-/*
- * Declarations of linker defined symbols which will help us find the layout
- * of trusted RAM
- */
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -103,8 +86,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE,
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
/*
diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
index 9cadba0bbc..6a07f09244 100644
--- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
@@ -37,18 +37,6 @@ enum {
* Declarations of linker defined symbols which will help us find the layout
* of trusted RAM
*/
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -131,8 +119,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE,
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
static void hikey960_ufs_reset(void)
diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
index 39551135f9..25eed5938c 100644
--- a/plat/hisilicon/poplar/bl1_plat_setup.c
+++ b/plat/hisilicon/poplar/bl1_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -23,13 +23,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Symbols from link script for conherent section */
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -92,8 +85,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE, /* l-loader and BL1 ROM */
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl1_platform_setup(void)