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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2019-01-25 13:28:38 +0000
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2019-02-01 12:24:57 +0000
commitf66053372952f9f30ffc4da28080c36a38e17ce5 (patch)
treeee4679495a390326c21fb528194bb68cd4340671 /plat/hisilicon/poplar
parentf7bf9b0d9543c37b1d6e65436a8f9eaabe1ad8a4 (diff)
downloadtrusted-firmware-a-f66053372952f9f30ffc4da28080c36a38e17ce5.tar.gz
Remove duplicated definitions of linker symbols
Many parts of the code were duplicating symbols that are defined in include/common/bl_common.h. It is better to only use the definitions in this header. As all the symbols refer to virtual addresses, they have to be uintptr_t, not unsigned long. This has also been fixed in bl_common.h. Change-Id: I204081af78326ced03fb05f69846f229d324c711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat/hisilicon/poplar')
-rw-r--r--plat/hisilicon/poplar/bl2_plat_setup.c16
-rw-r--r--plat/hisilicon/poplar/bl31_plat_setup.c16
2 files changed, 8 insertions, 24 deletions
diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c
index ff8e107db..11403b07f 100644
--- a/plat/hisilicon/poplar/bl2_plat_setup.c
+++ b/plat/hisilicon/poplar/bl2_plat_setup.c
@@ -24,14 +24,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Memory ranges for code and read only data sections */
-#define BL2_RO_BASE (unsigned long)(&__RO_START__)
-#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/* Memory ranges for coherent memory section */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
static console_pl011_t console;
@@ -206,10 +198,10 @@ void bl2_plat_arch_setup(void)
{
plat_configure_mmu_el1(bl2_tzram_layout.total_base,
bl2_tzram_layout.total_size,
- BL2_RO_BASE,
- BL2_RO_LIMIT,
- BL2_COHERENT_RAM_BASE,
- BL2_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl2_platform_setup(void)
diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c
index 69911e8d5..f81078f09 100644
--- a/plat/hisilicon/poplar/bl31_plat_setup.c
+++ b/plat/hisilicon/poplar/bl31_plat_setup.c
@@ -25,14 +25,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Memory ranges for code and RO data sections */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/* Memory ranges for coherent memory section */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
#define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45)
static entry_point_info_t bl32_image_ep_info;
@@ -133,10 +125,10 @@ void bl31_plat_arch_setup(void)
{
plat_configure_mmu_el3(BL31_BASE,
(BL31_LIMIT - BL31_BASE),
- BL31_RO_BASE,
- BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
INFO("Boot BL33 from 0x%lx for %lu Bytes\n",
bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2);