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authorSoby Mathew <soby.mathew@arm.com>2018-10-02 10:12:32 +0100
committerGitHub <noreply@github.com>2018-10-02 10:12:32 +0100
commit3ccfcd6e3dbc742ff15ead72d432427a38de650c (patch)
tree89dd07f10f24d0ac19e2f02c0d2470e6309a9e42 /include/drivers
parent9a983cfec21dea9347e191434ee704c57a55bda1 (diff)
parent991f1f4d94560adec7f4679339b3e6b4916d6896 (diff)
downloadtrusted-firmware-a-3ccfcd6e3dbc742ff15ead72d432427a38de650c.tar.gz
Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecatedv2.0-rc0
Remove deprecated interfaces for all platforms
Diffstat (limited to 'include/drivers')
-rw-r--r--include/drivers/arm/arm_gic.h34
-rw-r--r--include/drivers/arm/cci400.h76
-rw-r--r--include/drivers/arm/gic_v2.h280
-rw-r--r--include/drivers/arm/gic_v3.h73
-rw-r--r--include/drivers/arm/gicv2.h14
-rw-r--r--include/drivers/arm/gicv3.h23
-rw-r--r--include/drivers/arm/tzc400.h28
-rw-r--r--include/drivers/auth/mbedtls/mbedtls_config.h3
8 files changed, 2 insertions, 529 deletions
diff --git a/include/drivers/arm/arm_gic.h b/include/drivers/arm/arm_gic.h
deleted file mode 100644
index 8d2a23228c..0000000000
--- a/include/drivers/arm/arm_gic.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __ARM_GIC_H__
-#define __ARM_GIC_H__
-
-#include <cdefs.h>
-#include <stdint.h>
-
-/*******************************************************************************
- * Function declarations
- ******************************************************************************/
-void arm_gic_init(uintptr_t gicc_base,
- uintptr_t gicd_base,
- uintptr_t gicr_base,
- const unsigned int *irq_sec_ptr,
- unsigned int num_irqs) __deprecated;
-void arm_gic_setup(void) __deprecated;
-void arm_gic_cpuif_deactivate(void) __deprecated;
-void arm_gic_cpuif_setup(void) __deprecated;
-void arm_gic_pcpu_distif_setup(void) __deprecated;
-
-uint32_t arm_gic_interrupt_type_to_line(uint32_t type,
- uint32_t security_state) __deprecated;
-uint32_t arm_gic_get_pending_interrupt_type(void) __deprecated;
-uint32_t arm_gic_get_pending_interrupt_id(void) __deprecated;
-uint32_t arm_gic_acknowledge_interrupt(void) __deprecated;
-void arm_gic_end_of_interrupt(uint32_t id) __deprecated;
-uint32_t arm_gic_get_interrupt_type(uint32_t id) __deprecated;
-
-#endif /* __GIC_H__ */
diff --git a/include/drivers/arm/cci400.h b/include/drivers/arm/cci400.h
deleted file mode 100644
index e11dad45dd..0000000000
--- a/include/drivers/arm/cci400.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __CCI_400_H__
-#define __CCI_400_H__
-
-/**************************************************************
- * THIS DRIVER IS DEPRECATED. Please use the driver in cci.h
- **************************************************************/
-#if ERROR_DEPRECATED
-#error " The CCI-400 specific driver is deprecated."
-#endif
-
-
-/* Slave interface offsets from PERIPHBASE */
-#define SLAVE_IFACE4_OFFSET 0x5000
-#define SLAVE_IFACE3_OFFSET 0x4000
-#define SLAVE_IFACE2_OFFSET 0x3000
-#define SLAVE_IFACE1_OFFSET 0x2000
-#define SLAVE_IFACE0_OFFSET 0x1000
-#define SLAVE_IFACE_OFFSET(index) SLAVE_IFACE0_OFFSET + \
- (0x1000 * (index))
-
-/* Control and ID register offsets */
-#define CTRL_OVERRIDE_REG 0x0
-#define SPEC_CTRL_REG 0x4
-#define SECURE_ACCESS_REG 0x8
-#define STATUS_REG 0xc
-#define IMPRECISE_ERR_REG 0x10
-#define PERFMON_CTRL_REG 0x100
-
-/* Slave interface register offsets */
-#define SNOOP_CTRL_REG 0x0
-#define SH_OVERRIDE_REG 0x4
-#define READ_CHNL_QOS_VAL_OVERRIDE_REG 0x100
-#define WRITE_CHNL_QOS_VAL_OVERRIDE_REG 0x104
-#define QOS_CTRL_REG 0x10c
-#define MAX_OT_REG 0x110
-#define TARGET_LATENCY_REG 0x130
-#define LATENCY_REGULATION_REG 0x134
-#define QOS_RANGE_REG 0x138
-
-/* Snoop Control register bit definitions */
-#define DVM_EN_BIT (1 << 1)
-#define SNOOP_EN_BIT (1 << 0)
-
-/* Status register bit definitions */
-#define CHANGE_PENDING_BIT (1 << 0)
-
-#ifndef __ASSEMBLY__
-
-#include <stdint.h>
-
-/* Function declarations */
-
-/*
- * The CCI-400 driver must be initialized with the base address of the
- * CCI-400 device in the platform memory map, and the cluster indices for
- * the CCI-400 slave interfaces 3 and 4 respectively. These are the fully
- * coherent ACE slave interfaces of CCI-400.
- * The cluster indices must either be 0 or 1, corresponding to the level 1
- * affinity instance of the mpidr representing the cluster. A negative cluster
- * index indicates that no cluster is present on that slave interface.
- */
-void cci_init(uintptr_t cci_base,
- int slave_iface3_cluster_ix,
- int slave_iface4_cluster_ix) __deprecated;
-
-void cci_enable_cluster_coherency(unsigned long mpidr) __deprecated;
-void cci_disable_cluster_coherency(unsigned long mpidr) __deprecated;
-
-#endif /* __ASSEMBLY__ */
-#endif /* __CCI_400_H__ */
diff --git a/include/drivers/arm/gic_v2.h b/include/drivers/arm/gic_v2.h
deleted file mode 100644
index 258b898120..0000000000
--- a/include/drivers/arm/gic_v2.h
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __GIC_V2_H__
-#define __GIC_V2_H__
-
-/* The macros required here are additional to those in gic_common.h. */
-#include <gic_common.h>
-
-/******************************************************************************
- * THIS DRIVER IS DEPRECATED. For GICv2 systems, use the driver in gicv2.h
- * and for GICv3 systems, use the driver in gicv3.h.
- *****************************************************************************/
-#if ERROR_DEPRECATED
-#error " The legacy ARM GIC driver is deprecated."
-#endif
-
-#define GIC400_NUM_SPIS U(480)
-#define MAX_PPIS U(14)
-#define MAX_SGIS U(16)
-
-
-#define GRP0 U(0)
-#define GRP1 U(1)
-#define GIC_TARGET_CPU_MASK U(0xff)
-
-#define ENABLE_GRP0 (U(1) << 0)
-#define ENABLE_GRP1 (U(1) << 1)
-
-/* Distributor interface definitions */
-#define GICD_ITARGETSR U(0x800)
-#define GICD_SGIR U(0xF00)
-#define GICD_CPENDSGIR U(0xF10)
-#define GICD_SPENDSGIR U(0xF20)
-
-#define CPENDSGIR_SHIFT U(2)
-#define SPENDSGIR_SHIFT CPENDSGIR_SHIFT
-
-/* GICD_TYPER bit definitions */
-#define IT_LINES_NO_MASK U(0x1f)
-
-/* Physical CPU Interface registers */
-#define GICC_CTLR U(0x0)
-#define GICC_PMR U(0x4)
-#define GICC_BPR U(0x8)
-#define GICC_IAR U(0xC)
-#define GICC_EOIR U(0x10)
-#define GICC_RPR U(0x14)
-#define GICC_HPPIR U(0x18)
-#define GICC_AHPPIR U(0x28)
-#define GICC_IIDR U(0xFC)
-#define GICC_DIR U(0x1000)
-#define GICC_PRIODROP GICC_EOIR
-
-/* Common CPU Interface definitions */
-#define INT_ID_MASK U(0x3ff)
-
-/* GICC_CTLR bit definitions */
-#define EOI_MODE_NS (U(1) << 10)
-#define EOI_MODE_S (U(1) << 9)
-#define IRQ_BYP_DIS_GRP1 (U(1) << 8)
-#define FIQ_BYP_DIS_GRP1 (U(1) << 7)
-#define IRQ_BYP_DIS_GRP0 (U(1) << 6)
-#define FIQ_BYP_DIS_GRP0 (U(1) << 5)
-#define CBPR (U(1) << 4)
-#define FIQ_EN (U(1) << 3)
-#define ACK_CTL (U(1) << 2)
-
-/* GICC_IIDR bit masks and shifts */
-#define GICC_IIDR_PID_SHIFT U(20)
-#define GICC_IIDR_ARCH_SHIFT U(16)
-#define GICC_IIDR_REV_SHIFT U(12)
-#define GICC_IIDR_IMP_SHIFT U(0)
-
-#define GICC_IIDR_PID_MASK U(0xfff)
-#define GICC_IIDR_ARCH_MASK U(0xf)
-#define GICC_IIDR_REV_MASK U(0xf)
-#define GICC_IIDR_IMP_MASK U(0xfff)
-
-/* HYP view virtual CPU Interface registers */
-#define GICH_CTL U(0x0)
-#define GICH_VTR U(0x4)
-#define GICH_ELRSR0 U(0x30)
-#define GICH_ELRSR1 U(0x34)
-#define GICH_APR0 U(0xF0)
-#define GICH_LR_BASE U(0x100)
-
-/* Virtual CPU Interface registers */
-#define GICV_CTL U(0x0)
-#define GICV_PRIMASK U(0x4)
-#define GICV_BP U(0x8)
-#define GICV_INTACK U(0xC)
-#define GICV_EOI U(0x10)
-#define GICV_RUNNINGPRI U(0x14)
-#define GICV_HIGHESTPEND U(0x18)
-#define GICV_DEACTIVATE U(0x1000)
-
-#ifndef __ASSEMBLY__
-
-#include <mmio.h>
-#include <stdint.h>
-
-/*******************************************************************************
- * GIC Distributor function prototypes
- ******************************************************************************/
-
-unsigned int gicd_read_igroupr(uintptr_t, unsigned int);
-unsigned int gicd_read_isenabler(uintptr_t, unsigned int);
-unsigned int gicd_read_icenabler(uintptr_t, unsigned int);
-unsigned int gicd_read_ispendr(uintptr_t, unsigned int);
-unsigned int gicd_read_icpendr(uintptr_t, unsigned int);
-unsigned int gicd_read_isactiver(uintptr_t, unsigned int);
-unsigned int gicd_read_icactiver(uintptr_t, unsigned int);
-unsigned int gicd_read_ipriorityr(uintptr_t, unsigned int);
-unsigned int gicd_read_itargetsr(uintptr_t, unsigned int);
-unsigned int gicd_read_icfgr(uintptr_t, unsigned int);
-unsigned int gicd_read_cpendsgir(uintptr_t, unsigned int);
-unsigned int gicd_read_spendsgir(uintptr_t, unsigned int);
-void gicd_write_igroupr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_isenabler(uintptr_t, unsigned int, unsigned int);
-void gicd_write_icenabler(uintptr_t, unsigned int, unsigned int);
-void gicd_write_ispendr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_icpendr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_isactiver(uintptr_t, unsigned int, unsigned int);
-void gicd_write_icactiver(uintptr_t, unsigned int, unsigned int);
-void gicd_write_ipriorityr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_itargetsr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_icfgr(uintptr_t, unsigned int, unsigned int);
-void gicd_write_cpendsgir(uintptr_t, unsigned int, unsigned int);
-void gicd_write_spendsgir(uintptr_t, unsigned int, unsigned int);
-unsigned int gicd_get_igroupr(uintptr_t, unsigned int);
-void gicd_set_igroupr(uintptr_t, unsigned int);
-void gicd_clr_igroupr(uintptr_t, unsigned int);
-void gicd_set_isenabler(uintptr_t, unsigned int);
-void gicd_set_icenabler(uintptr_t, unsigned int);
-void gicd_set_ispendr(uintptr_t, unsigned int);
-void gicd_set_icpendr(uintptr_t, unsigned int);
-void gicd_set_isactiver(uintptr_t, unsigned int);
-void gicd_set_icactiver(uintptr_t, unsigned int);
-void gicd_set_ipriorityr(uintptr_t, unsigned int, unsigned int);
-void gicd_set_itargetsr(uintptr_t, unsigned int, unsigned int);
-
-
-/*******************************************************************************
- * GIC Distributor interface accessors for reading entire registers
- ******************************************************************************/
-
-static inline unsigned int gicd_read_ctlr(uintptr_t base)
-{
- return mmio_read_32(base + GICD_CTLR);
-}
-
-static inline unsigned int gicd_read_typer(uintptr_t base)
-{
- return mmio_read_32(base + GICD_TYPER);
-}
-
-static inline unsigned int gicd_read_sgir(uintptr_t base)
-{
- return mmio_read_32(base + GICD_SGIR);
-}
-
-
-/*******************************************************************************
- * GIC Distributor interface accessors for writing entire registers
- ******************************************************************************/
-
-static inline void gicd_write_ctlr(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICD_CTLR, val);
-}
-
-static inline void gicd_write_sgir(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICD_SGIR, val);
-}
-
-
-/*******************************************************************************
- * GIC CPU interface accessors for reading entire registers
- ******************************************************************************/
-
-static inline unsigned int gicc_read_ctlr(uintptr_t base)
-{
- return mmio_read_32(base + GICC_CTLR);
-}
-
-static inline unsigned int gicc_read_pmr(uintptr_t base)
-{
- return mmio_read_32(base + GICC_PMR);
-}
-
-static inline unsigned int gicc_read_BPR(uintptr_t base)
-{
- return mmio_read_32(base + GICC_BPR);
-}
-
-static inline unsigned int gicc_read_IAR(uintptr_t base)
-{
- return mmio_read_32(base + GICC_IAR);
-}
-
-static inline unsigned int gicc_read_EOIR(uintptr_t base)
-{
- return mmio_read_32(base + GICC_EOIR);
-}
-
-static inline unsigned int gicc_read_hppir(uintptr_t base)
-{
- return mmio_read_32(base + GICC_HPPIR);
-}
-
-static inline unsigned int gicc_read_ahppir(uintptr_t base)
-{
- return mmio_read_32(base + GICC_AHPPIR);
-}
-
-static inline unsigned int gicc_read_dir(uintptr_t base)
-{
- return mmio_read_32(base + GICC_DIR);
-}
-
-static inline unsigned int gicc_read_iidr(uintptr_t base)
-{
- return mmio_read_32(base + GICC_IIDR);
-}
-
-
-/*******************************************************************************
- * GIC CPU interface accessors for writing entire registers
- ******************************************************************************/
-
-static inline void gicc_write_ctlr(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_CTLR, val);
-}
-
-static inline void gicc_write_pmr(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_PMR, val);
-}
-
-static inline void gicc_write_BPR(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_BPR, val);
-}
-
-
-static inline void gicc_write_IAR(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_IAR, val);
-}
-
-static inline void gicc_write_EOIR(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_EOIR, val);
-}
-
-static inline void gicc_write_hppir(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_HPPIR, val);
-}
-
-static inline void gicc_write_dir(uintptr_t base, unsigned int val)
-{
- mmio_write_32(base + GICC_DIR, val);
-}
-
-/*******************************************************************************
- * Prototype of function to map an interrupt type to the interrupt line used to
- * signal it.
- ******************************************************************************/
-uint32_t gicv2_interrupt_type_to_line(uint32_t cpuif_base, uint32_t type);
-
-#endif /*__ASSEMBLY__*/
-
-#endif /* __GIC_V2_H__ */
diff --git a/include/drivers/arm/gic_v3.h b/include/drivers/arm/gic_v3.h
deleted file mode 100644
index 549b4d9f32..0000000000
--- a/include/drivers/arm/gic_v3.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __GIC_V3_H__
-#define __GIC_V3_H__
-
-/******************************************************************************
- * THIS DRIVER IS DEPRECATED. For GICv2 systems, use the driver in gicv2.h
- * and for GICv3 systems, use the driver in gicv3.h.
- *****************************************************************************/
-#if ERROR_DEPRECATED
-#error " The legacy ARM GIC driver is deprecated."
-#endif
-
-#include <mmio.h>
-#include <stdint.h>
-
-/* GICv3 Re-distributor interface registers & shifts */
-#define GICR_PCPUBASE_SHIFT 0x11
-#define GICR_TYPER 0x08
-#define GICR_WAKER 0x14
-
-/* GICR_WAKER bit definitions */
-#define WAKER_CA (U(1) << 2)
-#define WAKER_PS (U(1) << 1)
-
-/* GICR_TYPER bit definitions */
-#define GICR_TYPER_AFF_SHIFT 32
-#define GICR_TYPER_AFF_MASK 0xffffffff
-#define GICR_TYPER_LAST (U(1) << 4)
-
-/* GICv3 ICC_SRE register bit definitions*/
-#define ICC_SRE_EN (U(1) << 3)
-#define ICC_SRE_SRE (U(1) << 0)
-
-/*******************************************************************************
- * GICv3 defintions
- ******************************************************************************/
-#define GICV3_AFFLVL_MASK 0xff
-#define GICV3_AFF0_SHIFT 0
-#define GICV3_AFF1_SHIFT 8
-#define GICV3_AFF2_SHIFT 16
-#define GICV3_AFF3_SHIFT 24
-#define GICV3_AFFINITY_MASK 0xffffffff
-
-/*******************************************************************************
- * Function prototypes
- ******************************************************************************/
-uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr);
-
-/*******************************************************************************
- * GIC Redistributor interface accessors
- ******************************************************************************/
-static inline uint32_t gicr_read_waker(uintptr_t base)
-{
- return mmio_read_32(base + GICR_WAKER);
-}
-
-static inline void gicr_write_waker(uintptr_t base, uint32_t val)
-{
- mmio_write_32(base + GICR_WAKER, val);
-}
-
-static inline uint64_t gicr_read_typer(uintptr_t base)
-{
- return mmio_read_64(base + GICR_TYPER);
-}
-
-
-#endif /* __GIC_V3_H__ */
diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h
index d0480dba2f..c80f80b69f 100644
--- a/include/drivers/arm/gicv2.h
+++ b/include/drivers/arm/gicv2.h
@@ -7,6 +7,8 @@
#ifndef __GICV2_H__
#define __GICV2_H__
+#include <gic_common.h>
+
/*******************************************************************************
* GICv2 miscellaneous definitions
******************************************************************************/
@@ -132,14 +134,6 @@
* The 'gicc_base' field contains the base address of the CPU Interface
* programmer's view.
*
- * The 'g0_interrupt_array' field is a pointer to an array in which each entry
- * corresponds to an ID of a Group 0 interrupt. This field is ignored when
- * 'interrupt_props' field is used. This field is deprecated.
- *
- * The 'g0_interrupt_num' field contains the number of entries in the
- * 'g0_interrupt_array'. This field is ignored when 'interrupt_props' field is
- * used. This field is deprecated.
- *
* The 'target_masks' is a pointer to an array containing 'target_masks_num'
* elements. The GIC driver will populate the array with per-PE target mask to
* use to when targeting interrupts.
@@ -155,10 +149,6 @@
typedef struct gicv2_driver_data {
uintptr_t gicd_base;
uintptr_t gicc_base;
-#if !ERROR_DEPRECATED
- unsigned int g0_interrupt_num __deprecated;
- const unsigned int *g0_interrupt_array __deprecated;
-#endif
unsigned int *target_masks;
unsigned int target_masks_num;
const interrupt_prop_t *interrupt_props;
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index c9e28bae63..9c291eb3fd 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -276,23 +276,6 @@ static inline void gicv3_end_of_interrupt(unsigned int id)
* The 'gicr_base' field contains the base address of the Re-distributor
* interface programmer's view.
*
- * The 'g0_interrupt_array' field is a pointer to an array in which each entry
- * corresponds to an ID of a Group 0 interrupt. This field is ignored when
- * 'interrupt_props' field is used. This field is deprecated.
- *
- * The 'g0_interrupt_num' field contains the number of entries in the
- * 'g0_interrupt_array'. This field is ignored when 'interrupt_props' field is
- * used. This field is deprecated.
- *
- * The 'g1s_interrupt_array' field is a pointer to an array in which each entry
- * corresponds to an ID of a Group 1 interrupt. This field is ignored when
- * 'interrupt_props' field is used. This field is deprecated.
- *
- * The 'g1s_interrupt_num' field contains the number of entries in the
- * 'g1s_interrupt_array'. This field must be 0 if 'interrupt_props' field is
- * used. This field is ignored when 'interrupt_props' field is used. This field
- * is deprecated.
- *
* The 'interrupt_props' field is a pointer to an array that enumerates secure
* interrupts and their properties. If this field is not NULL, both
* 'g0_interrupt_array' and 'g1s_interrupt_array' fields are ignored.
@@ -326,12 +309,6 @@ typedef unsigned int (*mpidr_hash_fn)(u_register_t mpidr);
typedef struct gicv3_driver_data {
uintptr_t gicd_base;
uintptr_t gicr_base;
-#if !ERROR_DEPRECATED
- unsigned int g0_interrupt_num __deprecated;
- unsigned int g1s_interrupt_num __deprecated;
- const unsigned int *g0_interrupt_array __deprecated;
- const unsigned int *g1s_interrupt_array __deprecated;
-#endif
const interrupt_prop_t *interrupt_props;
unsigned int interrupt_props_num;
unsigned int rdistif_num;
diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h
index 7f354f8281..095099c602 100644
--- a/include/drivers/arm/tzc400.h
+++ b/include/drivers/arm/tzc400.h
@@ -86,16 +86,6 @@
TZC_REGION_ATTR_F_EN_SHIFT)
/*
- * Define some macros for backward compatibility with existing tzc400 clients.
- */
-#if !ERROR_DEPRECATED
-#define REG_ATTR_FILTER_BIT(x) ((1 << x) \
- << TZC_REGION_ATTR_F_EN_SHIFT)
-#define REG_ATTR_FILTER_BIT_ALL (TZC_400_REGION_ATTR_F_EN_MASK << \
- TZC_REGION_ATTR_F_EN_SHIFT)
-#endif /* __ERROR_DEPRECATED__ */
-
-/*
* All TZC region configuration registers are placed one after another. It
* depicts size of block of registers for programming each region.
*/
@@ -123,24 +113,6 @@ void tzc400_set_action(tzc_action_t action);
void tzc400_enable_filters(void);
void tzc400_disable_filters(void);
-/*
- * Deprecated APIs
- */
-static inline void tzc_init(uintptr_t base) __deprecated;
-static inline void tzc_configure_region0(
- tzc_region_attributes_t sec_attr,
- unsigned int ns_device_access) __deprecated;
-static inline void tzc_configure_region(
- unsigned int filters,
- int region,
- unsigned long long region_base,
- unsigned long long region_top,
- tzc_region_attributes_t sec_attr,
- unsigned int ns_device_access) __deprecated;
-static inline void tzc_set_action(tzc_action_t action) __deprecated;
-static inline void tzc_enable_filters(void) __deprecated;
-static inline void tzc_disable_filters(void) __deprecated;
-
static inline void tzc_init(uintptr_t base)
{
tzc400_init(base);
diff --git a/include/drivers/auth/mbedtls/mbedtls_config.h b/include/drivers/auth/mbedtls/mbedtls_config.h
index 59aeea9929..cc57b77984 100644
--- a/include/drivers/auth/mbedtls/mbedtls_config.h
+++ b/include/drivers/auth/mbedtls/mbedtls_config.h
@@ -30,9 +30,6 @@
/* Prevent mbed TLS from using snprintf so that it can use tf_snprintf. */
#define MBEDTLS_PLATFORM_SNPRINTF_ALT
-#if !ERROR_DEPRECATED
-#define MBEDTLS_PKCS1_V15
-#endif
#define MBEDTLS_PKCS1_V21
#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION